uaa2077ts NXP Semiconductors, uaa2077ts Datasheet - Page 4

no-image

uaa2077ts

Manufacturer Part Number
uaa2077ts
Description
2 Ghz Image Rejecting Front-end
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
FUNCTIONAL DESCRIPTION
Receive section
The circuit contains a low-noise amplifier followed by two
high dynamic range mixers (see Fig.3). The mixers are of
the Gilbert cell type, the architecture of which is fully
differential.
The LO signal is phase shifted into 45 and 135 signals,
mixed with the RF input signal to provide the
I and Q channel signals. The I and Q channel signals are
buffered, phase shifted by 45 and 135 respectively,
amplified and internally combined, thus obtaining image
rejection.
Balanced signal interfaces are used for minimizing
crosstalk from package parasitics.
2000 Apr 17
handbook, full pagewidth
2 GHz image rejecting front-end
RFINA
RFINB
3
4
V CCLNA
1
LNA
LNAGND
6
Fig.3 Receive section.
to LO section
GND
9
n.c.
2, 5, 8
4
The IF output is of a differential open collector type.
A typical application consists of pull-up resistors of 680
at each IF output and a differential load resistance of 1 k
for the IF filter, due to its impedance or its matching
network.
The power gain refers to the resulting power into the 1 k
load. The path for the DC current from V
collector outputs should be realized by the inductors.
The output signal is limited to V
Fast switching between power-down and the RX mode is
controlled by the mode control pin RXON.
RXON
135
45
10
COMBINER
UAA2077TS
IF
FCA013
CC
15
16
Preliminary specification
+ 3V
UAA2077TS
IFA
IFB
BE
CC
.
into the open

Related parts for uaa2077ts