hip6501a Intersil Corporation, hip6501a Datasheet
hip6501a
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hip6501a Summary of contents
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... Data Sheet Triple Linear Power Controller with ACPI Control Interface The HIP6501A, paired with either the HIP6020 or HIP6021, simplifies the implementation of ACPI-compliant designs in microprocessor and computer applications. The IC integrates two linear controllers and a low-current pass transistor, as well as the monitoring and control functions into a 16-pin SOIC package ...
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Block Diagram 12V 3V3DLSB 12V BIAS 12V MONITOR 10.8V/9.0V FAULT/MSEL UV DETECTOR + - MEM VOLTAGE + 40µA SELECT COMP 0. COMPARATOR - 5VDL + + 3.75V 10µA - 3V3DL 5VSB EA4 - + 5VSB POR 4.5V/4.0V MONITOR ...
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... HIP6501A CONTROLLER LINEAR CONTROLLER FIGURE 2. 12V 3V3DLSB Q3 3V3DL C OUT1 FAULT/MSEL HIP6501A R SEL S3 S5 EN5VDL EN3VDL GND FIGURE 3. Q1 LINEAR 2.5V MEM HIP6501A Q5 CONTROL LOGIC 5VSB Q1 DRV2 VSEN2 C OUT2 5VDLSB DLA Q5 5VDL C OUT3 Q4 5V DUAL V OUT2 2.5/3.3V MEM Q4 V OUT3 5V DUAL FN4749.6 December 30, 2004 ...
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... Sleep-Mode Regulation 3V3DL Nominal Voltage Level 3V3DL Under-voltage Rising Threshold 3V3DL Under-voltage Hysteresis 3V3DLSB Output Drive Current DLA Output Impedance 4 HIP6501A Thermal Information Thermal Resistance (Typical, Note 1) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C 12V Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s 300° ...
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... Internal circuitry de- glitches the S3 pin for disturbances. Additional circuitry blocks any illegal state transitions (such S4/S5 or vice versa). When entering an S4/S5 sleep state, the S3 signal is allowed to go low as far as 200µs (typically) ahead of the S5 signal. 5 HIP6501A SYMBOL TEST CONDITIONS ) I 5VDLSB = 4V 5VDLSB ...
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... ATX 5VSB output to the 5V output. Description Operation The HIP6501A controls 3 output voltages (Refer to Figures 1, 2, and 3 designed for microprocessor computer applications with 3.3V, 5V, 5VSB, and 12V outputs from an ATX power supply. The IC is composed of two linear controllers supplying the PCI slots’ 3.3V ) ...
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... The status of the EN3VDL and EN5VDL pins can only be changed while in active (S0, S1) states, when the bias supply (5VSB pin) is below POR level, or during chip shutdown (SS pin shorted to GND); a status change of these two pins while in a sleep state is ignored. 7 HIP6501A ) TRUTH TABLE 5VSB COMMENTS 3V3DLSB DLA ...
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... DRV2 VSEN2 FIGURE 8. 2.5/3.3V TIMING DIAGRAM MEM 8 HIP6501A Soft-Start Circuit Soft-Start into Sleep States (S3, S4/S5) The 5VSB POR function initiates the soft-start sequence. An internal 10µA current source charges an external capacitor to 5V. The error amplifiers reference inputs are clamped to a level proportional to the SS (Soft-Start) pin voltage. As the SS pin voltage slews from about 1 ...
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... Soft-Start into Active States (S0, S1) If both S3 and S5 are logic high at the time the 5VSB is applied, the HIP6501A will assume an active state and keep off the controlled external transistors until about 50ms after the ATX’s 12V output (sensed at the 12V pin) exceeds the set threshold (typically 10 ...
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... Shutdown In case of a FAULT condition that might endanger the computer system any other time, the HIP6501A can be shut down by pulling the SS pin below the specified shutdown level (typically 0.8V) with an open drain or open collector device capable of sinking a minimum of 2mA. ...
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... Input Capacitors Selection The input capacitors for an HIP6501A application must have sufficiently low ESR so that the input voltage does not dip excessively when energy is transferred to the output capacitors. If the ATX supply does not meet the specifications, certain imbalances between the ATX’ ...
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... HIP6501A Q3, Q5 The two N-Channel MOSFETs are used to switch the 3.3V and 5V inputs provided by the ATX supply into the 3.3VDUAL and 5VDUAL outputs, respectively, while in active (S0, S1) states ...
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... See Intersil’s web site www.intersil.com for the latest information 10µF C4 1µF 12V 5VSB 3V3DLSB Q3 3V3DL C7 220µF U1 FAULT/MSEL HIP6501A EN5VDL EN3VDL SS GND FIGURE 13. TYPICAL HIP6501A APPLICATION CIRCUIT + C3 220µF C5 1µF DRV2 Q1 2SD1802 VSEN2 + C8,9 C10 2x150µF 1µF Q4 5VDLSB FDV304P DLA Q5 1/2 HUF76113DK8 V 5VDL OUT3 5V ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 HIP6501A M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE ...