lt3579iufd-trpbf Linear Technology Corporation, lt3579iufd-trpbf Datasheet - Page 27

• Manufacturer Part Number: lt3579iufd-trpbf
• Description: Lt3579/lt3579-1 6a Boost/inverting Dc/dc Converter With Fault Protection Features
• Manufacturer: Linear Technology Corporation

APPENDIX
Table 6 shows a list of several ceramic capacitor man-
ufacturers. Consult the manufacturers for detailed infor-
mation on their entire selection of ceramic parts.
Table 6. Ceramic Capacitor Manufacturers
TDK
Murata
Taiyo Yuden
PMOS SELECTION
An external PMOS, controlled by the LT3579’s GATE pin,
can be used to facilitate input or output disconnect. The
GATE pin turns on the PMOS gradually during start-up
(see Soft-Start of External PMOS in the Operation section),
and turns the PMOS off when the LT3579 is in shutdown
or in fault.
The use of the external PMOS, controlled by the GATE pin,
is particularly benefi cial when dealing with unintended
output shorts in a boost regulator. In a conventional boost
regulator, the inductor, Schottky diode, and power switches
are susceptible to damage in the event of an output short
to ground. Using an external PMOS in the boost regulator’s
power path (path from V
pin, will serve to disconnect the input from the output
when the output has a short to ground, thereby helping
save the IC, and the other components in the power path
from damage.
The PMOS chosen must be capable of handling the
maximum input or output current depending on whether
the PMOS is used at the input (see Figure 12) or the output
(see Figure 13).
Ensure that the PMOS is biased with enough source to gate
voltage (V
of operation. The higher the V
PMOS, the lower the R
power dissipation in the device during normal operation,
as well as improving the effi ciency of the application in
which the PMOS is used. The following equations show
SG
) to enhance the device into the triode mode
www.tdk.com
www.murata.com
www.t-yuden.com
DSON
IN
to V
of the PMOS, thereby lowering
OUT
SG
) controlled by the GATE
voltage that biases the
the relationship between R
the desired V
When using a PMOS, it is advisable to confi gure the specifi c
application for undervoltage lockout (see the Operations
section). The goal is to have V
voltage where the PMOS has suffi cient headroom to attain
a high enough V
saturation mode of operation during start-up.
Figure 6 shows the PMOS connected in series with the
output to act as an output disconnect during a fault
condition. The Schottky diode from the V
pin is optional and helps turn off the PMOS quicker in the
event of hard shorts. The resistor from V
pin sets a UVLO of 4V for this application.
Connecting the PMOS in series with the output offers certain
advantages over connecting it in series with the input:
• Since the load current is always less than the input
• A PMOS in series with the output can be biased with
In contrast, an input connected PMOS works as a simple
hot-plug controller (covered in more detail in the Hot-Plug
section). The input connected PMOS also functions as an
inexpensive means of protecting against multiple output
shorts in boost applications that synchronize the LT3579
with other compatible ICs (see Figure 12).
current for a boost converter, the current rating of the
PMOS goes down when connected in series with the
output as opposed to the input.
a higher overdrive voltage than a PMOS used in series
with the input, since V
results in a lower R
the effi ciency of the regulator.
V
SG
=
⎧
⎪
⎨
⎪
⎩
V
S
933
SG
R
GATE
that the PMOS is biased with:
SG
μA R
R
GATE
, which prevents it from entering the
•
DSON
+
2
GATE
LT3579/LT3579-1
k
OUT
Ω
for the PMOS, thereby improving
GATE
if V
if
> V
IN
V V
GATE
GATE
(see Block Diagram) and
get to a certain minimum
IN
. This higher overdrive
<
>
2
2
IN
V
V
IN
pin to the GATE
to the SHDN
27
35791f