tza3054a NXP Semiconductors, tza3054a Datasheet - Page 13

• Manufacturer Part Number: tza3054a
• Description: 100 Mbits/s To 3.2 Gbits/s A-rate Tm Limiting Amplifier
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 13466
Objective data sheet
8.6.1 Fully automatic mode: automatic bandwidth and slew rate adjustment over
8.6 Manual settings
In the default operating mode of the TZA3054A ACE is switched on. This means that the
input bandwidth and output slew rate are adjusted automatically using the built-in
performance monitors. This allows for an optimum performance over the temperature
range at all bit rates in combination with very low power consumption.
As well as the fully automatic mode, two other modes are available:
Control is done via two I
for the output stage. Each register contains two control parameters: performance monitor
control (BW[4:0] and SLEW[4:0] respectively) and the octave selection (BWOCT[2:0] and
SLEWOCT[2:0] respectively).
An overview of the possible modes and the I
typical behavior of the rise and fall time in the different modes is illustrated in
similar picture can be made for the input bandwidth.
Table 4:
all bit rates
In the default and fully automatic mode SLEWOCT[2:0] and BWOCT[2:0] are equal to
111, which means that ACE is switched on.
By default, the performance monitor control values BW[4:0] and SLEW[4:0] are set to
01011. This leads to a bandwidth that is equal to approximately 70 % of the input data
rate, and the slew rate is adjusted so that the rise and fall times are equal to approximately
0.1 UI.
This mode gives a good trade off between performance and power consumption and is
the recommended setting.
Optimization of the relative bandwidth and relative slew rate is possible by changing the
BW[4:0] and OCT[4:0] values.
A low value for the bits BW[4:0] means that the bandwidth is maximized but still adjusted
according to the incoming bit rate. Increasing the value means that the bandwidth will be
smaller. This allows for optimization of the input stage with respect to the used optical
receiver, i.e. (A)PD + TIA; see
A similar approach is possible with the bits SLEW[4:0]. A low value give fast edges on the
output stage while increasing the value minimizes the slew rate. This allows for
optimization of the output stage with respect to EMI/EMC and power consumption; see
Figure
Mode
SLEWOCT[2:0] = BWOCT[2:0] = 111
SLEWOCT[2:0] = BWOCT[2:0] = variable
•
•
Semi-automatic mode: manual selection of bit rate range with automatic bandwidth
and slew rate adjustment within this range
Full manual mode: manual selection of bandwidth and slew rate values.
12.
The possible modes and the I
Rev. 01 — 12 August 2004
2
C-bus registers: BW (15h) for the input stage and SLEW (14h)
Figure
100 Mbit/s to 3.2 Gbit/s A-rate
11.
2
C-bus control values
SLEW[4:0] =
BW[4:0] = variable
fully automatic
semi-automatic
2
C-bus control values is given in
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
SLEW[4:0] =
BW[4:0] = 00000
not applicable
manual mode
TZA3054A
limiting amplifier
Table
Figure
4. The
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13. A