a4403geu-t Allegro MicroSystems, Inc., a4403geu-t Datasheet - Page 12

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a4403geu-t

Manufacturer Part Number
a4403geu-t
Description
Valley Current Mode Control Buck Converter
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
A4403
(f) The total losses can now be estimated:
4. The thermal impedance required for the solution can now be
determined:
Note that if a four-layer high thermal efficiency board is used, a
thermal impedance of around 30°C/W can be achieved.
Example
Given selected parameters:
(a) Switch static losses
Maximum duty cycle (equation 18):
R
Static loss for each switch (equation 20):
(b) Switch dynamic losses (equation 21):
V
V
f
T
Target junction temperature, T
V
C
DS(on)
SW
A
DIODE
P
IN
OUT
f
= 0.55 V, and
= 70°C,
DYN
(min) = 42 V,
P
= 1 MHz,
R
TOTAL
= 3.3 V at 3 A,
of the buck switch (equation 19):
DS(on)TJ
= 150 pF, then:
=
42 ×
= P
P
D (max)
STAT
=
STAT
3
2
350 × 10
× 5 × 10
= 3
R
+ P
JA
=
2
DYN
× 0.09 × 0.535 = 0.433 W
3.3 + 0.55
=
42 + 0.55
–3
–9
+ P
T
P
× 1000 × 10
J
TOTAL
J
– T
DIODECAP
1+
= 115°C,
A
115 – 25
170
=
0.09
.
+ P
3
×1.6
CTRL
=
0.535 Ω
=
+ P
0.504 W
GATE
Valley Current Mode Control Buck Converter
. (25)
(26)
(c) Diode capacitance turn-on loss (equation 22):
(d) Control losses (equation 23):
(e) Gate charge losses (equation 24):
(f) Total losses (equation 25):
Thermal impedance (equation 26):
For this particular solution, a PCB with high thermal efficency is
required to ensure the junction temperature is kept below 115°C.
For maximum effectiveness, the PCB area underneath the thermal
pad of the A4403 should be flooded with copper. Several thermal
vias (say between 4 and 8) should be used to connect the thermal
pad to the internal ground plane. If possible, a further thermal
copper plane should be applied to the bottom side of the PCB and
connected to the thermal pad of the A4403 through the vias.
This calculation assumes no thermal influence from other compo-
nents. If possible, it is advisable to mount the recirculation diode
(D1) on the reverse side of the printed circuit board. Ensure low
impedance electrical connections are implemented between board
layers.
PCB Layout Guidelines The ground plane is largely dic-
tated by the thermal requirements of the previous section. The
ground-referenced power components should be referenced to a
star ground, located away from the A4403 to minimize ground
bounce issues.
A small, local, relatively quiet ground plane near the A4403
should be used for the ground-referenced support components,
to minimize interference effects of ground noise from the power
circuitry. Figure 4 illustrates the recommended grounding archi-
tecture.
P
TOTAL
P
DIODECAP
= 0.433 + 0.504 + 0.132 + 0.168 + 0.21 = 1.447 W
P
GATE
P
=
= 5 × 10
CTRL
150 × 10
R
JA
= 0.004 × 42 = 0.168 W
=
–9
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
115 – 70
–12
× 1 × 10
1.447
× 42
2
2
6
=
×1 × 10
× 42 = 0.21 W
31°C/W
6
=
0.132 W
12

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