a4403geu-t Allegro MicroSystems, Inc., a4403geu-t Datasheet - Page 11

• Manufacturer Part Number: a4403geu-t
• Description: Valley Current Mode Control Buck Converter
• Manufacturer: Allegro MicroSystems, Inc.

A4403
R
diagram) should be placed close to the A4403 pins. The ground
sense should connect directly to the SGND and not to the power
ground.
Support Components The bootstrap capacitor (C2) and soft-
start capacitor (C5) should be ceramic X5R or X7R.
Thermal Considerations To ensure the A4403 operates in
the safe operating area, which effectively means restricting the
junction temperature to less than 150°C, several checks should be
made. The general approach is to work out what thermal imped-
ance, R
a given level, for a particular power dissipation. (Another factor
worth considering is that other power dissipating components
on the system PCB may influence the thermal performance of
the A4403. For example, the power loss contribution from the
recirculation diode and the sense resistor may cause the junction
temperature of the A4403 to be higher than expected.) It should
be noted that this process is usually an iterative one to achieve the
optimum solution.
The following steps can be used as a guideline for determining
the R
1. Estimate the maximum ambient temperature, T
application.
2. Define the maximum junction temperature, T
the absolute maximum is 150°C.
3. Determine the worst case power dissipation, P
occur at maximum load and minimum V
(a) Switch static losses
Estimate the maximum duty cycle:
where V
and sense resistor (R2, R3) under the given load current.
FILTER
JA
JA
and C
f
for a suitable thermal solution. :
is the forward voltage drop of the Schottky diode (D1)
, is required to maintain the junction temperature at
FILTER
D (max) =
(R7 and C7 in the Typical Application
V
V
IN
OUT
(min) + V
+ V
f
f
IN
. Contributors are:
,
J
(max). Note that
D
A
(max). This will
(max) , of the
Valley Current Mode Control Buck Converter
(18)
Estimate the R
temperature:
The static loss for each switch can be determined:
where I
(b) Switch dynamic losses
Both the turn-on and the turn-off losses can be estimated:
where f
(c) Diode capacitance turn-on loss
At turn-on, an additional current spike flows into the switch, caus-
ing a loss as follows:
where C
(d) Control losses
The control losses can be estimated as follows:
where I
(e) Gate charge losses
Estimate the charge losses as follows:
where Q = 5 nC and is the charge that is required to turn on the
buck switch.
P
DYN
R
LOAD
SW
VINON
P
DIODE
DS(on)TJ
DIODECAP
=
is the switching frequency.
P
V
is the load.
STAT
is the quiescent current with the converter enabled.
DS(on)
IN
is the body capacitance of the Schottky diode (D1).
(min) ×
=
= I
R
=
P
P
of the buck switch at the given junction
DS(on)25C
GATE
LOAD
CTRL
C
DIODE
I
LOAD
2
= Q × f
= I
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
2
× D (max) × R
VINON
⎛
⎜
⎜
⎝
× V
1+
2
× 5 × 10
IN
SW
T
2
J
170
× V
× f
× V
– 25
SW
IN
IN
–9
DS(on)TJ
× f
⎞
⎟
⎟
⎠
,
,
SW
,
.
× 1.6
,
,
(19)
(20)
(22)
(23)
(24)
(21)
11