ncp5423dr2g ON Semiconductor, ncp5423dr2g Datasheet - Page 11

• Manufacturer Part Number: ncp5423dr2g
• Description: Dual Outofphase Synchronous Buck Controller With Current Limit
• Manufacturer: ON Semiconductor

where:
Input Capacitor Selection
by their voltage and ripple current ratings. The designer
must choose capacitors that will support the worst case input
voltage with an adequate margin. To calculate the number of
input capacitors one must first determine the RMS ripple
current through the capacitors. To this end, first calculate the
average input current to the converter:
ripple current through the input capacitor will be:
where:
required number of input capacitor’s needed is based on the
rated RMS ripple current rating of the chosen capacitor.
Selection of the Output Capacitors
to yield optimal results. Capacitors should be chosen to
provide acceptable ripple on the regulator output voltage.
Key specifications for output capacitors are their ESR
(Equivalent Series Resistance), and ESL (Equivalent Series
Inductance). For best transient response, a combination of
low value/high frequency and bulk capacitors placed close
to the load will be required.
maximum voltage transient allowed during load transitions
has to be specified. The output capacitors must hold the
output voltage within these limits since the inductor current
can not change with the required slew rate. The output
capacitors must therefore have a very low ESL and ESR.
where:
I rms +
I in(Avg) +
The choice and number of input capacitors is determined
With the average input current determined, the RMS
I
2 respectively.
I
1 and 2 respectively. If the channel peak inductor current
is less than 50% of the channel output current it may be
neglected.
D
channel’s duty cycle is less than 50% so that each phase
does not overlap.
Once the RMS ripple current has been determined, the
These components must be selected and placed carefully
In order to determine the number of output capacitors the
The voltage change during the load current transient is:
o1,2
p1,2
1,2
I
DI
DI
Dt = load transient duration time;
L(VALLEY)
DV OUT + DI OUT
OUT
OUT
is the maximum DC output current for channel 1 and
is the channel duty cycle. Here it is assumed that each
is the peak inductor current (1/2 DI
/ Dt = load current slew rate;
= load transient;
I o1 2 )
V 1 · I 1 ) V 2 · I 2
= inductor valley current.
h · V in
I p1 2
3
· D 1 ) I o2 2 )
ESL
Dt
where h is the expected
efficiency (typical X 85%)
) ESR )
L
I p2 2
) for channel’s
3
C OUT
t TR
NCP5422A, NCP5423
· D 2 −I in 2
http://onsemi.com
11
change in output voltage due to ESR, ESL, and output
capacitor discharging or charging. Empirical data indicates
that most of the output voltage change (droop or spike
depending on the load current transition) results from the
total output capacitor ESR.
according to the formula:
where:
number of output capacitors can be found by using the
formula:
where:
be verified and compared to the value assigned by the
designer:
the following formula:
Selection of the Input Inductor
not disturb the input voltage. One method of achieving this
is by using an input inductor and a bypass capacitor. The
input inductor isolates the supply from the noise generated
in the switching portion of the buck regulator and also limits
the inrush current into the input capacitors upon power up.
The inductor’s limiting effect on the input current slew rate
becomes increasingly beneficial during load transients. The
worst case is when the load changes from no load to full load
(load step), a condition under which the highest voltage
change across the input capacitors is also seen by the input
inductor. The inductor successfully blocks the ripple current
while placing the transient current requirements on the input
bypass capacitor bank, which has to initially support the
sudden load change.
The designer has to independently assign values for the
The maximum allowable ESR can then be determined
Once the maximum allowable ESR is determined, the
The actual output voltage deviation due to ESR can then
Similarly, the maximum allowable ESL is calculated from
A common requirement is that the buck controller must
ESL = Maximum allowable ESL including capacitors,
ESR = Maximum allowable ESR including capacitors
t
DV
ESR
ESR
TR
ESR
= output voltage transient response time.
CAP
MAX
circuit traces, and vias;
and circuit traces;
Number of capacitors +
= change in output voltage due to ESR (assigned
by the designer)
= maximum ESR per capacitor (specified in
DV ESR + DI OUT
= maximum allowable ESR.
manufacturer’s data sheet).
ESL MAX +
ESR MAX +
DV ESL
DV ESR
DI OUT
DI
ESR MAX
ESR CAP
ESR MAX
Dt