ncp5423dr2g ON Semiconductor, ncp5423dr2g Datasheet
ncp5423dr2g
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ncp5423dr2g Summary of contents
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... WW = Work Week G = Pb−Free Package ORDERING INFORMATION Device Package NCP5422ADR2 SO−16 NCP5422ADR2G SO−16 (Pb−Free) NCP5423DR2G SO−16 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/ GATE(H)2 GATE(L)2 ...
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Q3 MTD3302 L2 1.5 V/ 1.3 mH C11−C13 MTD3302 3 × 680 mF/4 2 5.0 k ± 1.0% R8 C17 10 k ± 1.0% 100 pF Figure 1. Application ...
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ABSOLUTE MAXIMUM RATINGS Operating Junction Temperature Storage Temperature Range ESD Susceptibility (Human Body Model) Package Thermal Resistance, SO−16: Junction−to−Case, R qJC Junction−to−Ambient, R qJA Lead Temperature Soldering: Maximum ratings are those values beyond which device damage ...
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ELECTRICAL CHARACTERISTICS 10.8 V < V < 13.2 V; 10.8 V < BST < Characteristic Error Amplifier V Bias Current FB1(2) V Input Range FB1(2) COMP1,2 Source Current COMP1,2 Sink Current Reference Voltage 1(2) NCP5422A Reference ...
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ELECTRICAL CHARACTERISTICS (0°C < T 10.8 V < V < 13.2 V; 10.8 V < BST < Characteristic Supply Currents V Current CC BST Current Undervoltage Lockout Start Threshold Stop Threshold Hysteresis Hiccup Mode Overcurrent Protection ...
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V CC BIAS + − 8.6 V − 7.8 V IS+1 + IS−1 − − IS+2 + IS−2 − − + FAULT Set Dominant − 0.25 V ...
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THEORY OF OPERATION The NCP5422A dual power supply controller that 2 utilizes the V control method. Two synchronous V regulators can be built using a single controller. The fixed−frequency architecture, driven from a common oscillator, ensures a 180° ...
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V PWM comparator offset threshold and the artificial ramp, the PWM comparator terminates the initial pulse. 8.6 V 0.45 V UVLO STARTUP NORMAL OPERATION t S Figure 4. Idealized Waveforms Normal Operation During normal operation, the duty cycle of ...
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Figure 6. Hiccup Overcurrent Protection Output Enable On/Off control of the regulator outputs can be implemented by pulling the COMP pins low. The COMP pins must be driven below the 0.425 V PWM comparator offset voltage in order to disable ...
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Selecting the Switching Frequency Selecting the switching frequency is a trade−off between component size and power losses. Operation at higher switching frequencies allows the use of smaller inductor and capacitor values. Nevertheless common to select lower frequency operation ...
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I = inductor valley current. L(VALLEY) Input Capacitor Selection The choice and number of input capacitors is determined by their voltage and ripple current ratings. The designer must choose capacitors that will support the worst case input voltage with ...
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The minimum inductance value for the input inductor is therefore (dI dt) MAX where input inductor value voltage seen by the input inductor during a full load swing; (dI/dt) = maximum ...
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T = FET junction temperature ambient temperature total switching (upper) FET losses; HFET(TOTAL upper FET junction−to−ambient thermal resistance. qJA Selection of the Synchronous (Lower) FET The switch conduction losses for the ...
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Another means of sensing current is to use Inductor ESR. the intrinsic resistance of the inductor. A model of an inductor (Figure 9) reveals that the windings of an inductor have an effective series resistance (ESR). The voltage drop across ...
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Placement of the power component to minimize routing distance will also help to reduce emissions. LAYOUT GUIDELINES When laying out the CPU buck regulator ...
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... American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...