br93lc66 ROHM Co. Ltd., br93lc66 Datasheet
br93lc66
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br93lc66 Summary of contents
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... Data Retention • Overview The BR93LC66 series are CMOS serial input / output-type memory circuits (EEPROMs) that can be programmed electrically. Each is configured of 256 words data read from it and written to it. Operation control is performed using five types of commands. The commands, addresses, and data are input through the DI pin under the control of the CS and SK pins ...
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... Reduced by 3.0mW for each increase over 25 C. • Recommended operating conditions (Ta = 25°C) Parameter Symbol Power supply Writing V CC voltage Reading Input voltage BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV Power supply voltage detector Write disable Address Address 8bit buffer decoder Data 16bit register amplifier Limits Unit – ...
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... Output high level voltage V V – 0.4 — – 1.0 Input leakage current LI I – 1.0 Output leakage current LO Operating current I — CC2 dissipation 2 I — Standby current SB BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV Typ. Max. Unit — 0.8 V 2.0 — 0 — — 0 2.1mA OL 2.4 — — ...
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... DI hold time Data "1" output delay time Data "0" output delay time Time from CS to output confirmation Time from CS to output High impedance Write cycle time 4 BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV Command 1 Read (READ) Write Enabled (WEN) 2 Write (WRITE) Write to All Addresses (WRAL) ...
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... CS setup time DI setup time CS hold time DI hold time Data "1" output delay time Data "0" output delay time Time from CS to output High impedance Not designed for radiation resistance. BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV CC Symbol Min. Typ. Max. f — — ...
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... Also, CS must HIGH-Z state when DO is LOW. • After the completion of each mode, make sure that CS is set to LOW, to reset the internal circuit, before changing modes. 6 BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV t t ...
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... High-Z BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV (6) Write (Figure 4) This command writes the input 16-bit data (D15 to D0) to the specified address (A7 to A0). Actual writing of the data begins after CS falls (following the 27th clock pulse after the start bit input), and the Acquire state ...
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... To avoid this, make sure that DI = LOW when CS = HIGH. (Caution is especially important when common input ports are used.) This applies to all of the write commands High-Z 8 BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV D15 D14 Fig.4 Write cycle timing (WRITE) ...
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... Start bit 1bit a: Canceled by setting CS LOW Cannot be canceled by any method designated address is not secured OFF ( BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV Operating code Address 2bits 8bits Cancel can be performed for the entire read mode space Cancellation method: CS LOW Operating code Address ...
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... Here, the CS pin is pulled (Good example) In this case LOW when the power supply is turned (4) Clock (SK) rise conditions If the clock pin (SK) signal of the BR93LC66 / BR93LC- 66A has a long rise time (tr) and if noise on the signal line exceeds a certain level, erroneous operation can occur due to erroneous counts in the clock ...
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... DI and DO control line 1) Data collision between the -COM output and the DO output Within the input and output timing of the BR93LC66 the drive from the -COM output to the DI input and a sig- nal output from the DO output can be emitted at the same time. This happens only for the 1 clock cycle (a dummy bit “ ...
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... Memory ICs • External dimension (Units: mm) BR93LC66 9.3 0 7.62 2.54 0.5 0.1 0 ~15 DIP8 BR93LC66FV 3.0 0 (0.52) 0.65 0.22 0.1 0.3Min. SSOP-B8 12 BR93LC66 / BR93LC66F / BR93LC66RF / BR93LC66FV BR93LC66F / RF 1.27 0.1 5.0 0 0.4 0.1 0.3Min. 0.15 SOP8 ...