sak-xc2365a-72fxxl Infineon Technologies Corporation, sak-xc2365a-72fxxl Datasheet - Page 114

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sak-xc2365a-72fxxl

Manufacturer Part Number
sak-xc2365a-72fxxl
Description
16/32-bit Single-chip Microcontroller With 32-bit Performance
Manufacturer
Infineon Technologies Corporation
Datasheet
4.6.7
The debugger can communicate with the XC236xA either via the 2-pin DAP interface or
via the standard JTAG interface.
Debug via JTAG
The following parameters are applicable for communication through the JTAG debug
interface. The JTAG module is fully compliant with IEEE1149.1-2000.
Note: These parameters are not subject to production test but verified by design and/or
Note: Operating Conditions apply.
Table 35
Parameter
TCK clock period
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
TDI/TMS setup
to TCK rising edge
TDI/TMS hold
after TCK rising edge
TDO valid
after TCK falling edge
TDO high imped. to valid
from TCK falling edge
TDO valid to high imped.
from TCK falling edge
TDO hold after
TCK falling edge
1) Under typical conditions, the JTAG interface can operate at transfer rates up to 20 MHz.
2) The falling edge on TCK is used to generate the TDO timing.
3) The setup time for TDO is given implicitly by the TCK cycle time.
Data Sheet
characterization.
Debug Interface Timing
JTAG Interface Timing Parameters for Upper Voltage Range
2)
2)
2)3)
2)
Symbol
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
18
SR
SR
SR
SR
SR
SR
SR
CC
CC
CC
CC
Min.
50
16
16
6
6
5
XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
114
Values
Typ.
25
25
25
Max.
8
8
29
29
29
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Parameters
Test Condition
1)
V2.0, 2009-03

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