bu6520kv ROHM Co. Ltd., bu6520kv Datasheet - Page 10

• Manufacturer Part Number: bu6520kv
• Description: Tv Encoder Built In Adaptive Image Enhancer
• Manufacturer: ROHM Co. Ltd.

5. I
6. SPI BUS Format
* REG_WPB, REG_SCEB, SWDATA, and SRDATA in figure are the register names, and the each function is as follows.
The SCK clock frequency is as follows.
Register range : SPIPREDIV = 0～7. SPIDIV = 0～31
When CAMCKI is 27MHz, SCK becomes 3.3kHz from 13.5MHz.
sequence
sequence
Write
Read
Slave address is 70h.
The subaddress increment automatically when continuously accessing(read / write) it 2 times or more.
2
C BUS Format
SDI
SCLK
WPB
SCEB
SCK
SDO
SDI
The data w ritten in the
SWDATA register is set.
condition
START
S
S
S
SCK frequency = CAMCKI frequency ÷ 2
'H'/'L' level is set by the REG_SCEB register.
Slave address
Slave address
'H'/'L' level is set by the REG_WPB register.
S = START condition
P = STOP condition
REG_WPB
REG_SCEB
SWDATA[7:0] : Write data to EEPROM. It is transfer MSB first.
SRDATA[7:0] : Read data from EEPROM. Convert MSB first.
(70h)
(70h)
address
Slave
1-7
W7
R7
(0)
(0)
W
W
R/W
A(S)
A(S)
8
: Set WPB Terminal logic. Register value output direct.
: Set SCEB Terminal logic. Register value output direct
W6
R6
Sub address
Sub address
A(S) = acknowledge by slave
A(M) = acknowledge by master
ACK
9
W5
R5
Data transmission part
A(S)
A(S)
W4
R4
データ送受信波形
S
1-7
Sub address
Data
Slave address
10/12
(SPIPREDIV+1)
W3
R3
(70h)
8
A(S)
NA(S) = not acknowledge by slave
NA(M) = not acknowledge by master
W2
R2
(1)
R
÷(SPIDIV+1)
ACK
A(S)
9
Data
W1
R1
Data
A(S)
W0
R0
1-7
A(M)
Data
It is possible to read it
from the SRDATA register.
8
Data
ACK
Data
9
NA(S)
A(S)/
condition
P
STOP
NA(M)
A(M)/
P
P