mpc5534mzq66 Freescale Semiconductor, Inc, mpc5534mzq66 Datasheet
mpc5534mzq66
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mpc5534mzq66 Summary of contents
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... This document contains information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2006. All rights reserved. • Preliminary—Subject to Change Without Notice Document Number: MPC5534 Rev ...
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Overview PowerPC instruction set. This family of parts contains many new features coupled with high performance CMOS technology to provide significant performance improvement over the MPC565. The host processor core of the MPC5534 also includes an instruction set enhancement allowing ...
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... MPC5534 Lead 324 package MPC5534MVM80 MPC5534 Lead free 208 package MPC5534MVF80 MPC5534 Lead 208 package MPC5534MVZ66 MPC5534 Lead free 324 package MPC5534MZQ66 MPC5534 Lead 324 package MPC5534MVM66 MPC5534 Lead free 208 package MPC5534MVF66 MPC5534 Lead 208 package MPC5534MVZ40 MPC5534 Lead free 324 package ...
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Electrical Characteristics 3 Electrical Characteristics This section contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MCU. 3.1 Maximum Ratings Num Characteristic 3 1 1.5V Core Supply Voltage 2 Flash Program/Erase Voltage 3 Flash ...
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Table 2. Absolute Maximum Ratings Num Characteristic 27 Storage Temperature Range 28 Maximum Solder Temperature 14 29 Moisture Sensitivity Level 1 Functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress ratings only, and functional ...
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Electrical Characteristics Table 3. Thermal Characteristics (continued) Num Characteristic 5 6 Junction to Case 7 Junction to Package Top Natural Convection 1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, ...
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The thermal performance of any component depends strongly on the power dissipation of surrounding components. In addition, the ambient temperature varies widely within the application. For many natural convection and especially closed box applications, the board temperature at the perimeter ...
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Electrical Characteristics where thermocouple temperature on top of the package ( T Ψ = thermal characterization parameter ( power dissipation in the package (W) D The thermal characterization parameter is measured per JESD51-2 specification using ...
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Table 4. EMI Testing Specifications Num Characteristic DDSYN RC33 DD33 FLASH 5 VPP, VDDEH, VDDA Operating Voltages 6 Maximum Amplitude 7 Operating Temperature 1 EMI testing and I/O port waveforms per SAE ...
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Electrical Characteristics Table 6. VRC/POR Electrical Specifications (continued) Num Characteristic 5 VRC33 voltage when regulator controller allows the pass transistor completely turn on 6 VRC33 voltage above which the regulator controller will keep the 3, 4 1.5V ...
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Although there is no power sequencing required between VRC33 and VDDSYN during power up, for the VRC stage turn-on to operate within specification, VRC33 must not lead VDDSYN by more than 600 mV or lag by more than 100 mV. ...
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Electrical Characteristics the internal 3.3-V POR or the RESET power POR must be depended on to hold the device in reset. Since they may negate as low as 2 necessary for VDD to be within spec before ...
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Table 9. DC Electrical Specifications (continued) Num Characteristic 1 6 Analog Supply Voltage 2 8 Flash Programming Voltage 9 Flash Read Voltage 3 10 SRAM Standby Voltage 11 Clock Synthesizer Operating Voltage 12 Fast I/O Input High Voltage 13 Fast ...
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Electrical Characteristics Table 9. DC Electrical Specifications (continued) Num Characteristic 5 27c Operating Current 1.5V Supplies @ 40MHz: VDD (including VDDF max current) VDD (including VDDF max current) 27d IDD @ 25C STBY VSTBY @ 0.8V VSTBY @ 1.0V VSTBY ...
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Table 9. DC Electrical Specifications (continued) Num Characteristic 31 Fast I/O Weak Pull Up Current 1.62V – 1.98V 2.25V – 2.75V 3.0V – 3.6V Fast I/O Weak Pull Down Current 1.62V – 1.98V 2.25V – 2.75V 3.0V – 3.6V 32 ...
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Electrical Characteristics 7 High use current measured while running optimized SPE assembly code with all code and data 100% locked in cache (0% miss rate) with all channels of the eMIOS and eTPU running autonomously, plus the eDMA transferring data ...
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Table 10. I/O Pad Average DC Current Num Pad Type Symbol 9 Fast I DRV_FC These ...
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Electrical Characteristics Num Pad Type Symbol 1 Slow I 33_SH 2 Medium I 33_MH 3 Fast I 33_FC ...
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Oscillator & FMPLL Electrical Characteristics Table 12. HiP7 FMPLL Electrical Specifications (V DDSYN Num Characteristic 1 PLL Reference Frequency Range: Crystal reference External reference Dual Controller (1:1 mode System Frequency 3 System Clock Period 4 Loss of ...
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Electrical Characteristics Table 12. HiP7 FMPLL Electrical Specifications (continued) (V DDSYN Num Characteristic 20 Frequency Modulation Range Limit (f Max must not be exceeded) sys 21 ICO Frequency. f =[f *(MFD+4)]/(PREDIV+1) ico ref 22 Predivider Output Frequency (to PLL) 1 ...
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Table 13. eQADC Conversion Specifications (Operating) (continued) Num Characteristic 3 4 Resolution 5 INL: 6 MHz ADC Clock 6 INL: 12 MHz ADC Clock 7 DNL: 6 MHz ADC Clock 8 DNL: 12 MHz ADC Clock 9 Offset Error with ...
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Electrical Characteristics 3.11 H7Fb Flash Memory Electrical Characteristics Table 14. Flash Program and Erase Specifications Num Characteristic 3 Double Word (64 bits) Program Time 4 4 Page Program Time 7 16 Kbyte Block Pre-program and Erase Time 9 48 Kbyte ...
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Table 16. FLASH_BIU Settings vs. Frequency of Operation 2 Target Maximum Frequency (MHz and including 75 MHz up to and including 80 MHz Value at Reset 1 Illegal combinations exist. Therefore, all entries must be taken from the ...
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Electrical Characteristics 1 These are worst case values that are estimated from simulation and not tested. The values in the table are simulated 80MHz, VDD = 1.35V to 1.65V, VDDE = 1.62V to 1.98V, VDDEH = 4.5V ...
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Pad Internal Data Input Signal Pad Output 3.13 AC Timing 3.13.1 Reset and Configuration Pin Timing Table 19. Reset and Configuration Pin Timing Num 1 RESET Pulse Width 2 RESET Glitch Detect Pulse Width 3 PLLCFG, BOOTCFG, WKPCFG, RSTCFG Setup ...
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Electrical Characteristics RESET RSTOUT 3 PLLCFG BOOTCFG RSTCFG WKPCFG Figure 4. Reset and Configuration Pin Timing 3.13.2 IEEE 1149.1 Interface Timing Table 20. JTAG Pin AC Electrical Characteristics Num Characteristic 1 TCK Cycle Time 2 TCK Clock Pulse Width (Measured ...
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TCK 3 TCK TMS, TDI TDO Freescale Semiconductor 1 Figure 5. JTAG Test Clock Input Timing Figure 6. JTAG Test Access Port Timing MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Electrical Characteristics 2 ...
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Electrical Characteristics TCK JCOMP 28 9 Figure 7. JTAG JCOMP Timing MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice 10 Freescale Semiconductor ...
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TCK 11 Output Signals 12 Output Signals Input Signals Freescale Semiconductor 14 Figure 8. JTAG Boundary Scan Timing MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Electrical Characteristics ...
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Electrical Characteristics 3.13.3 Nexus Timing Num Characteristic 1 MCKO Cycle Time 2 MCKO Duty Cycle 3 MCKO Low to MDO Data Valid 4 MCKO Low to MSEO Data Valid 5 MCKO Low to EVTO Data Valid 6 EVTI Pulse Width ...
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TCK TMS, TDI TDO Freescale Semiconductor 10 11 Figure 10. Nexus TDI, TMS, TDO Timing MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Electrical Characteristics 12 31 ...
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Electrical Characteristics 3.13.4 External Bus Interface (EBI) Timing # Characteristic/Description Symbol 1 CLKOUT Period 2 CLKOUT duty cycle 3 CLKOUT rise time 4 CLKOUT fall time 5 CLKOUT Positive Edge to Output Signal Invalid or High Z (Hold Time) ADDR[8:31] ...
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Table 22. Bus Operation Timing # Characteristic/Description Symbol 7 Input Signal Valid to CLKOUT Posedge (Setup Time) ADDR[8:31 DATA[0:31] RD_WR TA TEA TS TSIZ[0:1] 8 CLKOUT Posedge to Input Signal Invalid (Hold Time) ADDR[8:31] BB ...
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Electrical Characteristics CLKOUT 5 OUTPUT VDDE/2 BUS 5 OUTPUT VDDE/2 SIGNAL OUTPUT SIGNAL Figure 12. Synchronous Output Timing MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice VDDE/2 5 VDDE VDDE/2 Freescale Semiconductor ...
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CLKOUT INPUT BUS INPUT SIGNAL VDDE/2 Freescale Semiconductor VDDE/2 7 VDDE/2 7 Figure 13. Synchronous Input Timing MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Electrical Characteristics ...
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Electrical Characteristics 3.13.5 External Interrupt Timing (IRQ Pin) Num Characteristic 1 IRQ Pulse Width Low 2 IRQ Pulse Width High 2 3 IRQ Edge to Edge Time 1 IRQ timing specified 80MHz, VDD = 1.35V to 1.65V, ...
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Timing Num Characteristic 1 eTPU Input Channel Pulse Width 2 eTPU Output Channel Pulse Width 1 eTPU timing specified 80MHz, VDD = 1.35V to 1.65V, VDDEH = 3.0V to 5.5V, VDD33 and VDDSYN = 3.0V ...
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Electrical Characteristics 3.13.7 eMIOS (MTS) Timing Num 1 eMIOS (MTS) Input Pulse Width 2 eMIOS (MTS) Output Pulse Width 1 MTS timing specified 80MHz, VDD = 1.35V to 1.65V, VDDEH = 3.0V to 5.5V, VDD33 and VDDSYN ...
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Num Characteristic 11 Data Valid (after SCK edge) Master (MTFE = 0) Slave Master (MTFE = 1, CPHA=0) Master (MTFE = 1, CPHA=1) 12 Data Hold Time for Outputs Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = ...
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Electrical Characteristics PCSx SCK Output (CPOL=0) SCK Output (CPOL=1) SIN SOUT Figure 19. DSPI Classic SPI Timing — Master, CPHA = 1 SS SCK Input (CPOL=0) SCK Input (CPOL=1) SOUT SIN Figure 20. DSPI Classic SPI Timing — Slave, CPHA ...
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SS SCK Input (CPOL=0) SCK Input (CPOL=1) SOUT SIN Figure 21. DSPI Classic SPI Timing — Slave, CPHA = 1 PCSx SCK Output (CPOL=0) SCK Output (CPOL=1) SIN SOUT Figure 22. DSPI Modified Transfer Format Timing — Master, CPHA = ...
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Electrical Characteristics PCSx SCK Output (CPOL=0) SCK Output (CPOL=1) SIN SOUT Figure 23. DSPI Modified Transfer Format Timing — Master, CPHA = 1 SS SCK Input (CPOL=0) SCK Input (CPOL=1) SOUT SIN Figure 24. DSPI Modified Transfer Format Timing — ...
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SS SCK Input (CPOL=0) SCK Input (CPOL=1) SOUT SIN Figure 25. DSPI Modified Transfer Format Timing — Slave, CPHA =1 PCSS PCSx Freescale Semiconductor 11 5 First Data Data 9 10 First Data Data 7 Figure 26. DSPI PCS Strobe ...
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Electrical Characteristics 3.13.9 eQADC SSI Timing Table 27. EQADC SSI Timing Characteristics (pads at 3. 5.0V) CLOAD = 25pF on all outputs. Pad drive strength set to maximum. Num Rating FCK Frequency 2 FCK Period ...
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Mechanicals 4.1 Pinouts 4.1.1 MPC5534 324 PBGA Pinout Figure pinout for the MPC5534 324 PBGA package VSSA1 A VSS VDD VSTBY AN37 AN11 VDDA1 B VDD33 VSS VDD AN36 AN39 ...
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Mechanicals 4.1.2 MPC5534 208 MAP BGA Pinout Figure pinout for the MPC5534 208 MAP BGA package. VDDEH10 and VDDEH6 are connected internally on the 208-ball package and are listed as VDDEH6 VSSA1 ...
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MPC5534 208-Pin Package Figure package drawing of the MPC5534 208-pin MAP BGA package. Freescale Semiconductor Figure 30. MPC5534 324 TEPBGA Package MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Mechanicals 47 ...
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Mechanicals 48 Figure 31. MPC5534 208 MAP BGA Package MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Freescale Semiconductor ...
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Revision History Table 28 provides a revision history of this document. Revision Location(s) Rev. 0 Freescale Semiconductor Table 28. Revision History This is the first released version of this document. MPC5534 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change ...
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... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. The PowerPC name is a trademark of IBM Corp. and is used under license. ...