mpc880 Freescale Semiconductor, Inc, mpc880 Datasheet - Page 68

• Manufacturer Part Number: mpc880
• Description: Mpc885 Powerquicc Integrated Communications Processor
• Manufacturer: Freescale Semiconductor, Inc

CPM Electrical Characteristics
1
Table 29
1
Figure 70
68
SCL frequency is given by SCL = BRGCLK_frequency/((BRG register + 3) × pre_scaler × 2).
The ratio SyncClk/(BRGCLK/pre_scaler) must be greater or equal to 4/1.
SCL frequency is given by SCL = BrgClk_frequency/((BRG register + 3) × pre_scaler × 2).
The ratio SyncClk/(Brg_Clk/pre_scaler) must be greater or equal to 4/1.
Num
Num
200
200
202
203
204
205
206
207
208
209
210
211
210
211
SDA
SCL
provides the I
SDL/SCL fall time
Stop condition setup time
SCL clock frequency (slave)
SCL clock frequency (master)
Bus free time between transmissions
Low period of SCL
High period of SCL
Start condition setup time
Start condition hold time
Data hold time
Data setup time
SDL/SCL rise time
SDL/SCL fall time
Stop condition setup time
shows the I
205
202
2
C bus timing.
2
206
MPC885/MPC880 PowerQUICC™ Hardware Specifications, Rev. 4
C (SCL > 100 kHz) timings.
Characteristic
Table 28. I
203
Table 29. I
1
Figure 70. I
Characteristic
2
C Timing (SCL < 100 kH
2
207
C Timing (SCL > 100 kH
2
209
C Bus Timing Diagram
Expression
204
fSCL
fSCL
—
—
—
—
—
—
—
—
—
—
210
Z
) (continued)
BRGCLK/16512
1/2(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(40 × fSCL)
Z
)
Min
—
—
0
0
All Frequencies
208
All Frequencies
Min
4.7
—
1/(10 × fSCL)
1/(33 × fSCL)
BRGCLK/48
BRGCLK/48
Freescale Semiconductor
211
Max
—
—
—
—
—
—
—
—
Max
300
—
Unit
Unit
Hz
Hz
ns
μs
s
s
s
s
s
s
s
s
s
s