mpc880 Freescale Semiconductor, Inc, mpc880 Datasheet - Page 36

• Manufacturer Part Number: mpc880
• Description: Mpc885 Powerquicc Integrated Communications Processor
• Manufacturer: Freescale Semiconductor, Inc

Bus Signal Timing
Table 10
1
Figure 26
Figure 27
36
Num
The I39 and I40 timings describe the testing conditions under which the IRQ lines are tested when being defined as level
sensitive. The IRQ lines are synchronized internally and do not have to be asserted or negated with reference to the CLKOUT.
The I41, I42, and I43 timings are specified to allow correct functioning of the IRQ lines detection circuitry and have no direct
relation with the total system interrupt latency that the MPC885/MPC880 is able to support.
I39
I40
I41
I42
I43
IRQx valid to CLKOUT rising edge (setup time)
IRQx hold time after CLKOUT
IRQx pulse width low
IRQx pulse width high
IRQx edge-to-edge time
provides the interrupt timing for the MPC885/MPC880.
CLKOUT
provides the interrupt detection timing for the external level-sensitive lines.
provides the interrupt detection timing for the external edge-sensitive lines.
CLKOUT
IRQx
IRQx
Figure 26. Interrupt Detection Timing for External Level Sensitive Lines
Figure 27. Interrupt Detection Timing for External Edge Sensitive Lines
MPC885/MPC880 PowerQUICC™ Hardware Specifications, Rev. 4
Characteristic
Table 10. Interrupt Timing
1
I39
I43
I41
I40
I43
4 × T
6.00
2.00
3.00
3.00
CLOCKOUT
Min
I42
All Frequencies
Freescale Semiconductor
Max
Unit
ns
ns
ns
ns
—