xe88lc05 ETC-unknow, xe88lc05 Datasheet - Page 12

• Manufacturer Part Number: xe88lc05
• Description: 16 10 Bit Data Acquisition Ultra Low-power Microcontroller
• Manufacturer: ETC-unknow

Data Acquisition Microcontroller
XE88LC05
6.9
Table 6.9:
6.10 Interrupts
Table 6.10:
6.11
Table 6.11:
Address
h003C
h003D
h003E
h003F
Address
h0040
h0041
h0042
h0043
h0044
h0045
h0046
h0047
Address
h0048
h0049
h004A
h004D
h004E
12
RegUsrtEdgeScl
RegEvnPriority
RegIrqEnLow
RegIrqPriority
RegIrqEnMid
RegIrqEnHig
RegUsrtData
RegEvnEvn
RegUsrtCtrl
RegUsrtSin
RegUsrtScl
RegIrqLow
RegEvnEn
RegIrqHig
RegIrqMid
RegIrqIrq
RegEvn
Name
Name
Name
Events
USRT
EvnPriority(7) EvnPriority(6) EvnPriority(5) EvnPriority(4) EvnPriority(3) EvnPriority(2) EvnPriority(1) EvnPriority(0)
IrqPriority(7)
rc1, 0 global
rc1, 0 global
rc1, 0 global
EvnEnCntA
rw, 0 global
rw, 0 global
rw, 0 global
IrqEnPA(7)
r, 1 global
r,1 global
EvnCntA
IrqPA(7)
IrqEnAc
Events control registers
Interrupts control registers
USRT control registers
IrqAc
7
7
7
rc1, 0 global
rc1, 0 global
rc1, 0 global
IrqPriority(6)
EvnEnCntC
rw, 0 global
rw, 0 global
rw, 0 global
IrqEnPA(6)
IrqEnPre1
r, 1 global
r,1 global
EvnCntC
IrqPA(6)
IrqPre1
6
6
6
rc1, 0 global
rc1, 0 global
rc1, 0 global
IrqPriority(5)
rw, 0 global
rw, 0 global
rw, 0 global
EvnEnPre1
IrqEnPA(5)
IrqEnCntB
r, 1 global
r,1 global
EvnPre1
IrqPA(5)
IrqCntB
5
5
5
EvnEnPA(1)
rc1, 0 global
rc1, 0 global
rc1, 0 global
rc1, 0 global
IrqPriority(4)
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
IrqEnPA(4)
IrqEnCntD
IrqEnCntA
r, 1 global
EvnPA(1)
r,1 global
IrqPA(4)
IrqCntA
IrqCntD
4
4
4
rc1, 0 global
rc1, 0 global
rc1, 0 global
rc1, 0 global
IrqPriority(3)
EvnEnCntB
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
UsrtWaitS0
IrqEnPA(3)
IrqEnCntC
IrqEnPre2
r, 1 global
r, 0 global
r,1 global
EvnCntB
IrqPA(3)
IrqCntC
IrqPre2
3
3
3
IrqPriority(2)
rc1, 0 global
rc1, 0 global
rc1, 0 global
UsrtEnWait-
EvnEnCntD
rw, 0 global
rw, 0 global
IrqEnPA(2)
rw, 0 global
rw, 0 global
r, 1 global
r, 0 global
EvnCntD
r,1 global
IrqEnVld
IrqPA(2)
Cond1
IrqVld
IrqHig
2
2
2
UsrtEnWaitS0
rc1, 0 global
rc1, 0 global
rc1, 0 global
IrqEnUartTx
IrqPriority(1)
EvnEnPre2
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
IrqEnPA(1)
r, 0 global
r, 1 global
r, 0 global
r,1 global
IrqUartTx
EvnPre2
EvnHigh
IrqPA(1)
IrqMid
1
1
1
rc1, 0 global
EvnEnPA(0)
rc1, 0 global
rc1, 0 global
IrqEnUartRx
IrqPriority(0)
UsrtEdgeScl
rw, 0 global
rw, 0 global
rw, 0 global
rw, 1 global
rw, 1 global
rw, 0 global
IrqEnPA(0)
UsrtEnable
EvnPA(0)
r, 0 global
IrqUartRx
r, 1 global
r, 0 global
r, 0 global
r,1 global
UsrtData
EvnLow
IrqPA(0)
D0109-40
UsrtSin
UsrtScl
IrqLow
0
0
0
r