cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 87

• Manufacturer Part Number: cy8c5588pvi-115es0
• Description: Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
• Manufacturer: Cypress Semiconductor Corporation.

11.1.3 Interrupt Controller
Table 11-6. Interrupt Controller AC Specifications
11.1.4 JTAG Interface
Table 11-7. JTAG Interface AC Specifications
11.1.5 SWD Interface
Table 11-8. SWD Interface AC Specifications
11.1.6 TPIU Interface
Table 11-9. TPIU Interface AC Specifications
Document Number: 001-44094 Rev. *J
f_TCK
T_TDI_setup
T_TDI_hold
T_TDO_valid
T_TDO_hold
f_SWDCK
T_SWDI_setup SWDIO input setup before SWDCK high T = 1/f_SWDCK
T_SWDI_hold
T_SWDO_valid SWDCK low to SWDIO output valid
T_SWDO_hold SWDIO output hold after SWDCK high T = 1/f_SWDCK
Notes
50. Based on device characterization (Not production tested).
51. f_TCK must also be no more than 1/3 CPU clock frequency.
52. f_SWDCK must also be no more than 1/3 CPU clock frequency.
53. TRACEPORT signal frequency and bit rate are limited by GPIO output frequency, see AC Specifications in
Parameter
Parameter
Parameter
Parameter
TDI, TMS hold after TCK high
TDO hold after TCK high
TCK to device outputs valid
SWDIO input hold after SWDCK high
TCK frequency
TDI, TMS setup before TCK high
TCK low to TDO valid
SWDCLK frequency
Delay from interrupt signal input to ISR
code execution from main line code
Delay from interrupt signal input to ISR
code execution from ISR code
TRACEPORT (TRACECLK) frequency
SWV bit rate
Description
Description
Description
Description
PRELIMINARY
[50]
[50]
[50]
3.3 V  V
1.71 V  V
T = 1/f_TCK
T = 1/f_TCK
T = 1/f_TCK
3.3 V  V
1.71 V  V
1.71 V  V
USBIO pins
T = 1/f_SWDCK
T = 1/f_SWDCK
Includes worse case completion of
longest instruction DIV with 6
cycles
Includes worse case completion of
longest instruction DIV with 6
cycles
DDD
DDD
DDD
DDD
DDD
Conditions
Conditions
Conditions
Conditions
PSoC
 5 V
 5 V
< 3.3 V
< 3.3 V
< 3.3 V, SWD over
®
5: CY8C55 Family Datasheet
“GPIO”
on page 58.
2T/5
2T/5
Min
Min
Min
T/4
T/4
T/4
T/4
T/4
Min
–
–
–
–
0
–
–
–
–
–
–
Typ
Typ
Typ
Typ
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Max
14
5.5
Max
TBD
33
33
7
14
20
20
Max
Max
7
[51]
–
–
–
–
[51]
[52]
–
–
–
–
[53]
[53]
[52]
[52]
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Tcy CPU
Tcy CPU
Units
Units
Units
MHz
MHz
Units
MHz
MHz
MHz
MHz
Mbit
ns
ns
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