tda9950 NXP Semiconductors, tda9950 Datasheet - Page 12

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tda9950

Manufacturer Part Number
tda9950
Description
Tda9950 Cec/i?c-bus Translator
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
TDA9950_1
Product data sheet
Fig 6. Host reads CEC Address ACK registers - after setting address pointer
Fig 7. Host writes CEC Configuration Register - after setting address pointer
Fig 8. Host writes last three CEC Data Registers
S
from master to slave
A = acknowledge (SDA = LOW)
S = START condition
P = STOP condition
R = read
W = write
A = acknowledge (SDA = LOW)
S = START condition
P = STOP condition
W = write
A = acknowledge (SDA = LOW)
A = not acknowledge (SDA = HIGH)
P = STOP condition
SLAVE ADDRESS
8.6.1 Notes on writing the CEC Data Registers
'0' (write)
W
.....
S
The CEC Data Registers should be written starting from the first CEC Data Register,
for the number of registers indicated by the contents of that first CEC Data Register, in
one contiguous operation.
A
write address pointer
from master to slave
from master to slave
write data 17h
SLAVE ADDRESS
<DATA 17h>
from slave to master
00000100
Sr = repeated START condition
Rev. 01 — 16 November 2007
A
A
'0' (write)
Sr
W
write data 18h
<DATA 18h>
A
SLAVE ADDRESS
write address pointer
from slave to master
from slave to master
00000110
A
A
write data 19h
'1' (read)
<DATA 19h>
R
write config
<CCONR>
A
read address H
<ACKH>
001aag928
001aag929
A
A
P
P
A
CEC/I
....
read address L
TDA9950
© NXP B.V. 2007. All rights reserved.
2
C-bus translator
<ACKL>
001aag927
A
12 of 24
P

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