tda9950 NXP Semiconductors, tda9950 Datasheet

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tda9950

Manufacturer Part Number
tda9950
Description
Tda9950 Cec/i?c-bus Translator
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
2.1 Principal features
2.2 Additional features
The TDA9950 is a single-chip CEC/I
control and interfacing of the Consumer Electronics Control (CEC), a feature of the
High-Definition Multimedia Interface (HDMI).
The TDA9950 is an interface between the CEC protocol and timings and the standard
I
CEC line. A message received from the CEC line is stored in a buffer, and an interrupt is
generated indicating that a message can be read via the I
consumption the TDA9950 sets itself to Idle mode when there is no message on the CEC
line nor on the I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
C-bus. A message received on the I
TDA9950
CEC/I
Rev. 01 — 16 November 2007
Receive and transmit CEC messages with compliant Signal Free Time handling
I
Supports multiple CEC logical addresses
Supports CEC messages up to 16 bytes in length
Programmable retry count
Comprehensive arbitration and collision handling
3.0 V to 3.6 V V
Automatic Idle mode to reduce power consumption when there is no message on CEC
line and I
I/O pins are 5 V tolerant
Processor with embedded software to control the interface between CEC line and
I
Active-LOW reset input and on-chip power-on reset allows operation without external
reset components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets.
On-chip oscillator for 12 MHz crystal
Schmitt trigger port inputs
2
2
C-bus interface to host supporting 100 kbit/s and 400 kbit/s communication
C-bus
2
C-bus translator
2
C-bus
2
C-bus.
DD
operating range
2
2
C-bus translator with a processor, dedicated to the
C-bus interface is written in a buffer and sent on the
2
C-bus. To reduce its power
Product data sheet

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tda9950 Summary of contents

Page 1

... C-bus. A message received on the I CEC line. A message received from the CEC line is stored in a buffer, and an interrupt is generated indicating that a message can be read via the I consumption the TDA9950 sets itself to Idle mode when there is no message on the CEC line nor on the I 2. Features 2 ...

Page 2

... Operating mode Idle mode clock frequency Standard mode Fast mode Ordering information Package Name Description TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator Min Typ Max Unit 3.0 3.3 3 ...

Page 3

... SCL 10 Rev. 01 — 16 November 2007 TDA9950 CEC/I CPU 2 I C-BUS internal bus INTERRUPT POWER-ON RESET INT_POL 17 RSVD7 16 RSVD6 TDA9950 RSVD5 13 RSVD4 12 RSVD3 11 RSVD2 001aag923 2 C-bus translator A0 A1 SCL SDA INT INT_POL RST 001aag922 © NXP B.V. 2007. All rights reserved. ...

Page 4

... I A1 — I C-bus slave address bit — I C-bus slave address bit 1. Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator for bit starting with falling edge DD for bit starting with rising edge SS for a DD for a SS © NXP B.V. 2007. All rights reserved. ...

Page 5

... Bit Value [1] The Most Significant Bit (MSB), b7, is sent first. A1 and A0 are hardware-selectable pins. In case of independent CEC, a system could have up to four TDA9950 devices on the 2 same I The four addresses are defined by the state of the inputs A0 and A1 (logic 1 when connected to V 8.2 Configuring the TDA9950 The TDA9950 is controlled via a series of registers ...

Page 6

... INT line. When the INT line is active, it will match the state of the input on pin The state of the INT line is always reflected in the TDA9950 Status Register possible to regularly poll this register instead of monitoring the INT line. However, this method is less effi ...

Page 7

... CCR - TDA9950 Control Register (address 03h) bit description (Read/Write) Symbol Description RESET RESET: Resets the TDA9950. Any transmission in progress will be completed first - the reset occurs once the TDA9950 returns to the idle state. All default values will be restored specific action resets the TDA9950. ON_OFF ...

Page 8

... Communication between the TDA9950 and the host using the CEC Data Registers is carried out using frames of information. The host is the master of all data transfers; the TDA9950 uses the INT line to inform the host that it has data available. Before a frame is read or written, the host must set the REG_PTR field in the Address Pointer Register to the base CEC Data Register address ...

Page 9

... TDA9950 (subject to the appropriate Signal Free Time rules being satisfied). Table 16. Parameter AddressByte DataBytes 8.5.2 CECData.cnf service This service is used by the TDA9950 to inform the host of the success or other result of a CECData.req service. The parameters are shown in Table 17. Parameter ResultCode TDA9950_1 Product data sheet shows the organization of the ServiceSelector values ...

Page 10

... CECData.err service This service is used to alert the host to an error condition. There are no parameters. The host should read the TDA9950 Error Register CER for details of the error. This indication will only occur when bit ENABLE_ERROR of the CEC Configuration Register CCONR is set to enable error indications ...

Page 11

... A = acknowledge (SDA = LOW START condition P = STOP condition Fig 4. Host reads TDA9950 Status Register - after setting address pointer A = acknowledge (SDA = LOW START condition P = STOP condition Fig 5. Host reads TDA9950 Status Register - without setting address pointer (was at 0) TDA9950_1 Product data sheet W A 00000000 A ...

Page 12

... SLAVE ADDRESS W A 00000110 '0' (write) write address pointer from slave to master <DATA 17h> A <DATA 18h> write data 17h write data 18h from slave to master Rev. 01 — 16 November 2007 TDA9950 CEC <ACKH> A .... '1' (read) read address L read address H A <CCONR> write config ...

Page 13

... Data Register. • If reading stops before all indicated CEC Data Registers are read, the TDA9950 will reset the INT line and the message is discarded by the TDA9950 and will not be available for reading again. • If reading continues for more CEC Data Registers than are indicated by the first CEC Data Register, the value FFh will be read ...

Page 14

... FrameByteCount = 4, ServiceSelector = CECData.req, AddressByte = DVD/TV, DataByte = <TextView On>. • Wait for INT line to be asserted When TDA9950 has a response, it will assert the INT line (the host could also poll bit CSR[6]). • I2C_WRITE: 07h; I2C_READ: 03h, 01h, 00h Set Address Pointer to 07h (Data Register 1), read CEC Data Registers. ...

Page 15

... Parameters are valid over ambient temperature range unless otherwise specified. All voltages are with respect to V noted. TDA9950_1 Product data sheet [1] Conditions all I/O and output pins on pins XTAL1, XTAL2 except pins XTAL1, XTAL2, V Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator Min Max +150 ...

Page 16

... pins XTAL1, XTAL2; with respect except pins XTAL1, XTAL2 with respect 2.4 V < V < 3 Operating mode Idle mode [ Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator [1] Min Typ Max 3.0 3.3 3 ...

Page 17

... TDA9950_1 Product data sheet = 12 MHz (crystal); unless otherwise specified. osc Conditions pin RST any pin except RST pin RST any pin except RST Standard mode Fast mode Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator Min Typ Max - - ...

Page 18

... CEC_IN 8 TDA9950 CEC_OUT address address configuration (polarity) INT_POL 18 (polarity) CEC_POL 1 Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator PMLL4148 220 pF 220 pF CEC line 100 k BC817 220 001aag930 PMLL4148 CEC line SLEW RATE ...

Page 19

... MO-153 Rev. 01 — 16 November 2007 CEC detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION TDA9950 2 C-bus translator SOT360 ( 0.5 8 0.1 o 0.2 0 ISSUE DATE 99-12-27 03-02-19 © NXP B.V. 2007. All rights reserved ...

Page 20

... NXP Semiconductors 14. Revision history Table 23. Revision history Document ID Release date TDA9950_1 20071116 TDA9950_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator Supersedes - © NXP B.V. 2007. All rights reserved ...

Page 21

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 16 November 2007 TDA9950 2 CEC/I C-bus translator © NXP B.V. 2007. All rights reserved ...

Page 22

... I C-bus register configuration . . . . . . . . . . . . . .5 Table 6. APR - Address Pointer Register (address 00h) bit description (Write mode Table 7. CSR - TDA9950 Status Register (address 00h) bit description (Read mode Table 8. CER - TDA9950 Error Register (address 01h) bit description (Read only Table 9. CVR - TDA9950 Version Register (address 02h) bit description (Read only) ...

Page 23

... Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Fig 2. Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . .3 Fig 3. Frame format for the data register protocol . . . . . .8 Fig 4. Host reads TDA9950 Status Register - after setting address pointer .11 Fig 5. Host reads TDA9950 Status Register - without setting address pointer (was .11 Fig 6. Host reads CEC Address ACK registers - after setting address pointer ...

Page 24

... CECData.ind service . . . . . . . . . . . . . . . . . . . 10 8.5.4 CECData.err service 8.5.5 CECData.ier service . . . . . . . . . . . . . . . . . . . . 10 8.6 Example communication sequences . . . . . . . 11 8.6.1 Notes on writing the CEC Data Registers 8.6.2 Notes on reading the CEC Data Registers . . . 13 8.7 Using the TDA9950 . . . . . . . . . . . . . . . . . . . . 13 8.7.1 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8.7.2 Sending a CEC message . . . . . . . . . . . . . . . . 14 8.7.3 Receiving a CEC message Limiting values Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 17 12 Application information ...

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