tda8757c NXP Semiconductors, tda8757c Datasheet - Page 15

• Manufacturer Part Number: tda8757c
• Description: Tda8757c Triple 8-bit Adc 205 Msps
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 10111
Preliminary data
Fig 7. Definition of odd and even pixels; Edge = 0, Dmx = 0 and Ckrp = 1.
CKREFO
CKADC
CKREF
OUT A
8.2.5 PLL
The ADCs are clocked by either the internal PLL locked to the reference clock
CKREF or an external clock connected to pin CKEXT. All parts of the PLL are on-chip
except the loop filter capacitors. The selection is performed via the serial interface by
setting bit ‘Ckext’ in register PHASE (Ckext = 1 when the external clock is used).
The reference clock (CKREF) range is between 15 and 150 kHz. Consequently, the
VCO minimum frequency is 12 MHz and the maximum frequency is 205 MHz. The
gain of the VCO part can be controlled through the serial interface, depending on the
frequency range to which the PLL is locked.
Moreover, the PLL may be locked either on the rising or on the falling edge of the
CKREF signal pulses. This choice is made via the serial interface by setting bit ‘Edge’
in register CONTROL (rising edge when bit ‘Edge’ = 0).
The charge pump current (I
through the serial interface by setting bits ‘Ip2’, ‘Ip1’ and ‘Ip0’ in the control register
(see
Different resistance values (R) for the filter can also be programmed through the
serial interface by setting the bits ‘Z2’, ‘Z1’ and ‘Z0’ in register VCO (see
To have optimal PLL performance, R and I
Lim
•
•
The result of the product ‘R
The result of the product ‘R
XXX
Table
=
0.3
--------------------------------------------------
8).
DR
K
PLL
0
Rev. 01 — 14 August 2002
f
ref
XXX
cp
) can increase the PLL bandwidth. It is programmable
I
I
cp
cp
’ is smaller than a determined limit (Lim)
’ is as close as possible to this limit (Lim).
cp
ODD
must be chosen so that:
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Triple 8-bit ADC 205 Msps
EVEN
TDA8757C
FCE708
Table
15 of 38
9).
(1)