maxq7670aatl+ Maxim Integrated Products, Inc., maxq7670aatl+ Datasheet - Page 23

• Manufacturer Part Number: maxq7670aatl+
• Description: Microcontroller With 12-bit Adc, Pga, 64kb Flash, And Can Interface
• Manufacturer: Maxim Integrated Products, Inc.

The MAXQ7670A includes a 16-bit timer channel. The
timer offers two ports, T0 and T0B, to facilitate PWM
outputs, and capture timing events. The autoreload 16-
bit timer/counter offers the following functions:
• 8-/16-bit timer/counter
• Up/down autoreload
• Counter function of external pulse
• Capture
• Compare
• PWM output
• Event timer
• System supervisor
Refer to the MAXQ7670 User’s Guide and Application
Note 3205: Using Timers in the MAXQ Family of
Microcontrollers for more information about the timer
module.
The MAXQ7670A incorporates a fully compliant CAN
2.0B controller.
Two groups of registers provide the µC interface to the
CAN controller. To simplify the software associated with
the operation of the CAN controllers, most of the global
CAN status and controls as well as the individual mes-
sage center control/status registers are located in the
peripheral register map. The remaining registers asso-
ciated with the data identification, identification masks,
format, and data are located in a dual port memory to
allow the CAN controller and the processor access to
the required functions. The CAN controller can directly
access the dual port memory. The processor accesses
the dual port memory through a dedicated interface
that consists of the CAN 0 data pointer (C0DP) and the
CAN 0 data buffer (C0DB) special function registers.
See Figure 9 for CAN controller details.
The CAN module stores up to 15 messages. Each mes-
sage consists of an acceptance identifier and 8 bytes
of data. The MAXQ7670A supports both the standard
11-bit and extended 29-bit identification modes.
IEEE is a registered service mark of the Institute of Electrical and Electronics Engineers.
______________________________________________________________________________________
CAN Functional Description
PGA, 64KB Flash, and CAN Interface
CAN Interface Bus
Timer and PWM
Microcontroller with 12-Bit ADC,
Configure each of the first 14 message centers either to
transmit or receive. Message center 15 is a receive-
only center, storing any message that centers 1–14 do
not accept.
A message center only accepts an incoming message
if the following conditions are satisfied:
• The incoming message’s arbitration value matches
• The first 2 data bytes of the incoming message match
Use the global mask registers to mask out bits in the
incoming message that do not require a comparison.
A message center, configured to transmit, meets these
conditions: T/R = 1, TIH = 0, DTUP = 1, MSRDY = 1,
and MTRQ = 1. The message center transmits its con-
tents when it receives an incoming request message
containing the same identifier (i.e., a remote frame).
Global control and status registers in the CAN unit
enable the µC to evaluate error messages, validate and
locate new data, establish the bus timing for the CAN
bus, establish the identification mask bits, and verify the
source of individual messages. In addition, each mes-
sage center is individually equipped with the necessary
status and controls to establish directions, interrupt gen-
eration, identification mode (standard or extended), data
field size, data status, automatic remote frame request
and acknowledgment, and masked or nonmasked identi-
fication acceptance testing.
The joint test action group (JTAG) IEEE
dard defines a unique method for in-circuit testing and
programming. The MAXQ7670A conforms to this stan-
dard, implementing an external test access port (TAP)
and internal TAP controller for communication with a
JTAG bus master, such as an automatic test equipment
(ATE). For detailed information on the TAP and TAP
controller, refer to IEEE Standard 1149.1 on the IEEE
website at www.standards.ieee.org. The JTAG on the
MAXQ7670A does not support boundary scan test
capability.
the message center’s acceptance identifier
the bytes in the media arbitration registers (C0MA0
and C0MA1)
JTAG Interface Bus
®
1149.1 stan-
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