maxq7666batm Maxim Integrated Products, Inc., maxq7666batm Datasheet - Page 31

• Manufacturer Part Number: maxq7666batm
• Description: 16-bit, Risc, Microcontroller-based, Smart Data-acquisition System
• Manufacturer: Maxim Integrated Products, Inc.

as transmit-and-receive data buffers for a debugger.
From a JTAG perspective, shift registers are user-
defined optional data registers. The bypass register
and the instruction register, for example, are realized as
a set of shift-register-based elements connected in par-
allel between a common serial input (TDI) and a com-
mon serial output (TDO). The instruction register,
through the TAP controller, selects one of the registers
to form an active serial path.
Maintain the maximum TCK clock frequency to below
1/8 of the system clock frequency for proper operation.
The following four digital I/Os form the TAP interface:
• TDO—Serial output signal for test instruction and
Figure 12. JTAG Interface Block Diagram
data. Data transitions on the falling edge of TCK.
PO.1/TMS
PO.3/TCK
PO.2/TDI
______________________________________________________________________________________
TO DEBUG
DV
DV
DV
ENGINE
DDIO
DDIO
DDIO
POWER-ON
RESET
16-Bit, RISC, Microcontroller-Based,
WRITE
READ
Smart Data-Acquisition System
7 6 5
INSTRUCTION REGISTER
CONTROLLER
SYSTEM PROGRAMMING REGISTER
DEBUG REGISTER
SHADOW REGISTER
TAP
4 3 2
BYPASS
4 3 2
• TDI—Serial input signal for test instruction and
• TCK—Serial clock for the test logic. When TCK
1 0 S1 S0
UPDATE-DR
UPDATE-DR
TDO idles high when inactive. TDO serially trans-
fers internal data to the external host. Data trans-
fers least significant bit first.
data. Transition data on the rising edge of TCK. TDI
pulls high when unconnected. TDI serially transfers
data from the external host to the internal TAP mod-
ule shift registers. Data transfers least significant
bit first.
stops at 0, storage elements in the test logic must
retain their data indefinitely. Force TCK high when
inactive.
2
1 0
1 0
MAXQ7666
DV
DDIO
PO.0/TDO
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