pcf85133 NXP Semiconductors, pcf85133 Datasheet - Page 12

• Manufacturer Part Number: pcf85133
• Description: Universal Lcd Driver For Low Multiplex Rates
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF85133_1
Product data sheet
7.5.1 Internal clock
7.5.2 External clock
7.5 Oscillator
7.6 Timing
7.7 Display register
The internal logic and the LCD drive signals of the PCF85133 are timed by a frequency f
which either is derived from the built-in oscillator frequency f
or equals an external clock frequency f
The internal oscillator is enabled by connecting pin OSC to V
from pin CLK provides the clock signal for cascaded PCF85133s in the system. After
power-up, pin SDA must be HIGH to guarantee that the clock starts.
Connecting pin OSC to V
external clock input.
A clock signal must always be supplied to the device; removing the clock may freeze the
LCD in a DC state.
The clock frequency f
follows:
The internal clock frequency f
frequencies are available: 82 Hz or 110 Hz (typical), see
Table 6.
The timing of the PCF85133 organizes the internal data flow of the device. This includes
the transfer of display data from the display RAM to the display segment outputs. In
cascaded applications, the synchronization signal (SYNC) maintains the correct timing
relationship between all the PCF85133s in the system.
The display register holds the display data while the corresponding multiplex signals are
generated. There is a one-to-one relationship between the data in the display register, the
LCD segment outputs and one column of the display RAM.
f
Pin FF tied to
V
V
f
f
clk
clk
fr
DD
SS
=
=
=
---------
f
24
clk
--------- -
f
f
64
osc
clk ext
LCD frame frequencies
clk
Rev. 1 — 17 February 2009
determines the LCD frame frequency f
DD
enables an external clock source. Pin CLK then becomes the
Typical clock frequency (Hz)
1970
2640
clk
can be selected using pin FF. As a result 2 frame
clk(ext)
Universal LCD driver for low multiplex rates
:
Table
LCD frame frequency (Hz)
82
110
osc
SS
:
fr
6.
. In this case the output
and is calculated as
PCF85133
© NXP B.V. 2009. All rights reserved.
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(4)
(5)
(6)
clk