74lvch8t245pw NXP Semiconductors, 74lvch8t245pw Datasheet - Page 22

• Manufacturer Part Number: 74lvch8t245pw
• Description: 8-bit Dual Supply Translating Transceiver; 3-state
• Manufacturer: NXP Semiconductors

NXP Semiconductors
74LVC_LVCH8T245_1
Product data sheet
13.2 Bidirectional logic level-shifting application
13.3 Power-up considerations
Figure 15
level-shifting application.
Table 16
and then from system-2 to system-1.
Table 16.
[1]
The device is designed such that no special power-up sequence is required other than
GND being applied first.
Table 17.
State DIR CTRL OE
1
2
3
4
V
0 V
1.8 V
2.5 V
3.3 V
5.0 V
Fig 15. Bidirectional logic level-shifting application
CC(A)
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
DIR CTRL
V
I/O-1
H
H
L
L
CC1
gives a sequence that will illustrate data transmission from system-1 to system-2
Schematic given for one channel.
Pull-up or pull-down only needed for 74LVC8T245.
OE
shows the 74LVC8T245; 74LVCH8T245 being used in a bidirectional logic
Description bidirectional logic level-shifting application
Typical total supply current (I
V
0 V
0
< 1
< 1
< 1
< 1
system-1
CC(B)
PULL-UP/DOWN
L
H
H
L
Rev. 01 — 11 January 2010
V
CC1
1.8 V
< 1
< 2
< 2
< 2
2
I/O-1
output
Z
Z
input
74LVC8T245; 74LVCH8T245
V
CC(A)
GND
A
I/O-2
input
Z
Z
output
8-bit dual supply translating transceiver; 3-state
2.5 V
< 1
< 2
< 2
< 2
< 2
CC(A)
74LVCH8T245
74LVC8T245
+ I
Description
system-1 data to system-2
system-2 is getting ready to send data to
system-1. I/O-1 and I/O-2 are disabled. The
bus-line state depends on bus hold.
DIR bit is set LOW. I/O-1 and I/O-2 still are
disabled. The bus-line state depends on bus
hold.
system-2 data to system-1
CC(B)
)
3.3 V
< 1
< 2
< 2
< 2
< 2
B
OE
V
DIR
CC(B)
V
PULL-UP/DOWN
CC2
5.0 V
< 1
2
< 2
< 2
< 2
[1]
system-2
© NXP B.V. 2010. All rights reserved.
Unit
μA
μA
μA
μA
μA
V
I/O-2
CC2
001aak439
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