74lvch8t245pw NXP Semiconductors, 74lvch8t245pw Datasheet
74lvch8t245pw
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74lvch8t245pw Summary of contents
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Rev. 01 — 11 January 2010 1. General description The 74LVC8T245; 74LVCH8T245 are 8-bit dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two data input-output ports ...
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... OFF Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range −40 °C to +125 °C 74LVC8T245PW 74LVCH8T245PW −40 °C to +125 °C 74LVC8T245BQ 74LVCH8T245BQ 4. Functional diagram CC(A) CC(B) 22 ...
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... NXP Semiconductors Fig 2. Logic diagram (one channel) 5. Pinning information 5.1 Pinning 74LVC8T245 74LVCH8T245 V 1 CC(A) DIR GND 11 GND 12 001aak436 Fig 3. Pin configuration SOT355-1 (TSSOP24) 74LVC_LVCH8T245_1 Product data sheet 74LVC8T245; 74LVCH8T245 8-bit dual supply translating transceiver; 3-state ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin V 1 CC(A) DIR [1] GND 11 [1] GND 12 [1] GND 21, 20, 19, 18, 17, 16, 15, 14 data input or output CC( CC(B) [1] All GND pins must be connected to ground (0 V). ...
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... NXP Semiconductors Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter I ground current GND T storage temperature stg P total power dissipation tot [1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed. ...
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... NXP Semiconductors Table 6. Typical static characteristics recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I bus hold LOW overdrive BHLO current I bus hold HIGH overdrive BHHO current I OFF-state output current OZ I power-off leakage current OFF C input capacitance I C input/output capacitance ...
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... NXP Semiconductors Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level data input IL input voltage V = 1.2 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI 5.5 V CCI DIR, OE input V = 1.2 V CCI ...
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... NXP Semiconductors Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I bus hold HIGH port BHH current bus hold LOW port BHLO ...
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... NXP Semiconductors Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I supply current A port CC( 5 CC( CC(A) B port CC( CC( 5 CC(B) A plus B port ( CC(A) ΔI additional per input ...
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... NXP Semiconductors 10. Dynamic characteristics Table 8. Typical dynamic characteristics at V Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t propagation delay disable time dis enable time [ the same as t and t ...
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... NXP Semiconductors Dynamic characteristics for temperature range −40 °C to +85 °C Table 11. Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions = 1.5 V ± 0 CC(A) t propagation delay disable time dis enable time ...
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... NXP Semiconductors Dynamic characteristics for temperature range −40 °C to +125 °C Table 12. Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions = 1.5 V ± 0 CC(A) t propagation delay disable time dis enable time ...
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... NXP Semiconductors 11. Waveforms Bn, An output Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 5. The data input (An, Bn) to output (Bn, An) propagation delay times OE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF ...
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... NXP Semiconductors negative positive Test data is given in Table 14 Load resistance Load capacitance including jig and probe capacitance Termination resistance External voltage for measuring switching times. EXT Fig 7. Load circuitry for switching times Table 14. Test data Supply voltage Input Δ ...
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... NXP Semiconductors 12. Typical propagation delay characteristics 14 t PHL (ns HIGH to LOW propagation delay ( PHL (ns) 12 (1) (2) (3) 10 (4) (5) ( HIGH to LOW propagation delay ( ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( ...
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... NXP Semiconductors 14 t PHL (ns HIGH to LOW propagation delay ( PHL (ns (1) (2) (3) 8 (4) (5) ( HIGH to LOW propagation delay ( ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. ...
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... NXP Semiconductors 14 t PHL (ns HIGH to LOW propagation delay ( PHL (ns (1) 8 (2) (3) (4) ( HIGH to LOW propagation delay ( ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. ...
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... NXP Semiconductors 14 t PHL (ns HIGH to LOW propagation delay ( PHL (ns (1) (2) (3) 6 (4) (5) ( HIGH to LOW propagation delay ( ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. ...
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... NXP Semiconductors 14 t PHL (ns HIGH to LOW propagation delay ( PHL (ns (1) (2) 6 (3) (4) ( HIGH to LOW propagation delay ( ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. ...
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... NXP Semiconductors 14 t PHL (ns HIGH to LOW propagation delay ( PHL (ns (1) 6 (2) (3) (4) 4 (5) ( HIGH to LOW propagation delay ( ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. ...
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... NXP Semiconductors 13. Application information 13.1 Unidirectional logic level-shifting application The circuit given in used in an unidirectional logic level-shifting application. Schematic given for one channel. Fig 14. Unidirectional logic level-shifting application Table 15. Name V CC(A) GND A B DIR V CC(B) OE 74LVC_LVCH8T245_1 Product data sheet 74LVC8T245; 74LVCH8T245 8-bit dual supply translating transceiver; 3-state Figure example of the 74LVC8T245 ...
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... NXP Semiconductors 13.2 Bidirectional logic level-shifting application Figure 15 level-shifting application. V CC1 I/O-1 DIR CTRL Schematic given for one channel. Pull-up or pull-down only needed for 74LVC8T245. Fig 15. Bidirectional logic level-shifting application Table 16 gives a sequence that will illustrate data transmission from system-1 to system-2 and then from system-2 to system-1. ...
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... NXP Semiconductors 14. Package outline TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0.30 5 0.2 0.00 0.18 5.4 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 15. Abbreviations Table 18. Abbreviations Acronym Description DUT Device Under Test 16. Revision history Table 19. Revision history Document ID Release date 74LVC_LVCH8T245_1 20100111 74LVC_LVCH8T245_1 Product data sheet 74LVC8T245; 74LVCH8T245 8-bit dual supply translating transceiver; 3-state Data sheet status Change notice Product data sheet - Rev. 01 — ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 10 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 12 Typical propagation delay characteristics . . 15 13 Application information ...