lmk03002c National Semiconductor Corporation, lmk03002c Datasheet
lmk03002c
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lmk03002c Summary of contents
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... Clock generator performance ( MHz) — LMK03002C: 200 fs RMS jitter ■ Jitter cleaner performance grade (12 kHz to 20 MHz) — LMK03002: 800 fs RMS jitter — LMK03002C: 400 fs RMS jitter ■ VCO frequency: 1566 to 1724 MHz ■ Clock output frequency range 862 MHz ■ ...
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Functional Block Diagram www.national.com 2 30020601 ...
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Connection Diagram Pin Descriptions Pin # 13, 16, 19, 22, 26, Vcc1, Vcc2, Vcc3, Vcc4, Vcc5, Vcc6, Vcc7, Vcc8, 30, 31, 33, 37, 40, 43, 46 Vcc9, Vcc10, Vcc11, Vcc12, Vcc13, Vcc14 ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Parameter Power Supply Voltage Input Voltage Storage Temperature Range Lead Temperature (solder 4 s) Junction Temperature Recommended Operating Conditions ...
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... VCO Tuning Range Fout Allowable Temperature Drift for |Δ Continuous Lock Output Power Ω load driven by Fout LMK03002/LMK03002C Fout Fine Tuning Sensitivity (The lower sensitivity indicates the typical K sensitivity at the lower end of the tuning Vtune range, the higher sensitivity at the higher ...
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Symbol Parameter Clock Distribution Section (Note 10) - LVPECL Clock Outputs Jitter Additive RMS Jitter (Note 10) ADD t CLKoutX to CLKoutY (Note 11) SKEW V Output High Voltage OH V Output Low Voltage OL V Differential Output Voltage OD ...
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Note 9: VCO phase noise is measured assuming the VCO is the dominant noise source due loop bandwidth. Over frequency, the phase noise typically varies dB, with the worst case performance typically ...
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Charge Pump Current Specification Definitions I1 = Charge Pump Sink Current Charge Pump Sink Current Charge Pump Sink Current Charge Pump Source Current Charge ...
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... The 1st and 2nd order poles are off-chip to provide flexibility for the design of various loop filter bandwidths. The LMK03002/LMK03002C includes a 1.64 GHz VCO. The VCO output is optionally accessible on the Fout port. Inter- nally, the VCO output goes through an VCO Divider to feed the various clock distribution blocks ...
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... General Programming Information The LMK03002/LMK03002C devices are programmed using several 32-bit registers which control the device's operation. The registers consist of a data field and an address field. The last 4 register bits, ADDR[3:0] form the address field. The re- maining 28 bits form the data field DATA[27:0]. ...
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CLKout0_EN CLKout1_EN CLKout2_EN CLKout3_EN RESET Register 0 DIV4 11 www.national.com ...
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POWERDOWN EN_CLKout_Global EN_Fout Register www.national.com 12 ...
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REGISTERS R0 Registers R4 through R7 control the four clock outputs. Reg- ister R3 controls CLKout0, Register R4 controls CLKout1, and so on. There is one additional bit in register R0 called RESET. The X in ...
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CLKoutX_DLY[3: ...
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VCO_R3_LF[2: 2.5.3 VCO_R4_LF[2:0] -- Value for Internal Loop Filter Resistor R4 These bits control the R4 resistor value in the internal loop filter. The recommended setting for VCO_R4_LF[2: for optimum phase noise and jitter. VCO_R4_LF[2:0] ...
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OSCin_FREQ[7:0] -- Oscillator Input Calibration Adjustment These bits are to be programmed to the OSCin frequency. If the OSCin frequency is not an integral multiple of 1 MHz, then round to the closest value. OSCin_FREQ[7:0] 2.6 REGISTER R14 2.6.1 ...
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PLL_MUX[3:0] -- Multiplexer Control for LD Pin These bits set the output mode of the LD pin. The table below lists several different modes. PLL_MUX[3:0] Output Type 0 Hi-Z 1 Push-Pull 2 Push-Pull 3 Push-Pull 4 Push-Pull 5 Push-Pull ...
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Register R15 Programming R15 also activates the frequency calibration routine. 2.7.1 PLL_N[17:0] -- PLL N Divider These bits program the divide value for the PLL N Divider. The PLL N Divider follows the VCO Divider and precedes the PLL ...
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Application Information 3.1 SYSTEM LEVEL DIAGRAM The following shows the LMK300xx in a typical application. In this setup the clock may be multiplied, reconditioned, and re- 3.2 BIAS PIN To properly use the device, bypass Bias (pin 36) with ...
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LOOP FILTER The internal charge pump is directly connected to the inte- grated loop filter components. The first and second pole of the loop filter are externally attached as shown in Figure 2. When www.national.com the loop filter is ...
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... V. Therefore the power dissipated in each emitter resistor is approximately (1.07 V) 3.6 THERMAL MANAGEMENT Power consumption of the LMK03002/LMK03002C devices can be high enough to require attention to thermal manage- ment. For reliability and performance reasons the die tem- perature should be limited to a maximum of 125 °C. That is, ...
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To minimize junction temperature it is recommended that a simple heat sink be built into the PCB (if the ground plane layer is not exposed). This is done by including a copper area of about 2 square inches on the ...
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... Ordering Information Order Number Package Marking LMK03002ISQ K03002 I LMK03002ISQX K03002 I LMK03002CISQ K03002CI LMK03002CISQX K03002CI Leadless Leadframe Package (Bottom View) 48 Pin LLP (SQA48A) Package Packing VCO Version 250 Unit Tape and Reel 1.64 GHz 2500 Unit Tape and Reel 1.64 GHz 250 Unit Tape and Reel 1 ...
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