w83195bg-202 Winbond Electronics Corp America, w83195bg-202 Datasheet
w83195bg-202
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w83195bg-202 Summary of contents
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... W83195BR-202 W83195BG-202 Winbond Clock Generator for AMD K8 System Series Chipsets Date: 4/10/2006 Revision: 0.6 ...
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... CLOCK GEN. FOR AMD K8 SYSTEM SERIES CHIPSET W83195BR-202/W83195BG-202 Data Sheet Revision History PAGES DATES VERSION 1 n.a. 01/11/2005 n.a. 04/10/2006 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this data sheet belong to their respective owners. ...
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... Register 13: Step-less Enable Control (Default: 3Fh)...........................................................12 7.15 Register 14: Control (Default: 10h) ........................................................................................12 7.16 Register 15: SST Control (Default: E9h) ...............................................................................13 7.17 Register 16: Skew Control (Default: E0h) .............................................................................13 7.18 Register 17: Slew rate Control (Default: 03h)........................................................................14 7.19 Register 18: Reserved (Default: 7Ah)....................................................................................14 7.20 Register 19: Control (Default: 22h) ........................................................................................14 7.21 Register 20: Watch dog timer (Default: 88h).........................................................................15 W83195BR-202/W83195BG-202 - II - ...
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... CPU Electrical Characteristics ...............................................................................................18 9.5 AGP Electrical Characteristics ...............................................................................................19 9.6 PCI Electrical Characteristics.................................................................................................19 9.7 24M, 48M Electrical Characteristics ......................................................................................20 9.8 REF Electrical Characteristics ...............................................................................................20 9.9 PCIEX 0.7V Electrical Characteristics ...................................................................................21 10. ORDERING INFORMATION .................................................................................................... 22 11. HOW TO READ THE TOP MARKING ..................................................................................... 22 12. PACKAGE DRAWING AND DIMENSIONS ............................................................................. 23 W83195BR-202/W83195BG-202 Publication Release Date: Apr. 2006 - III - Revision 0.6 ...
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... Programmable S.S.T. scale to reduce EMI • Programmable registers to enable/stop each output and select modes • Watch dog timer and RESET# output pins • 56-pin SSOP package W83195BR-202/W83195BG-202 By the way, the W83195BR-202 also Publication Release Date: Apr. 2006 - 1 - Employing the use ...
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... Internal Pull-down resistor 120KΩ to GND 4. BLOCK DIAGRAM W83195BR-202/W83195BG-202 & ...
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... PCIEXC [0:5] 35,34,33,32 26 AGPCLK2 AGPCLK1 27 & FS4 28 AGPCLK0 W83195BR-202/W83195BG-202 DESCRIPTION Input Latch input pin and internal 120KΩ pull down Latch input pin and internal 120KΩ pull up Output Bi-directional Pin Bi-directional Pin, Open Drain Open Drain Active Low Internal 120kΩ pull-up Internal 120kΩ ...
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... OUT 22 * SEL24_48# IN 48MHz OUT 21 *FS1 IN W83195BR-202/W83195BG-202 TYPE OUT 3.3V PCI clock output. Latched input for FS2 at initial power up for H/W selecting the output frequency. Latched voltage level IN td120k refers to Vil_FS and Vih_FS voltage level. This is internal 120K pull down. OUT 3.3V PCI clock output. ...
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... VDDPCIEX 25 VDDAGP 20 VDD48 55 VDDCPU 1 VDDREF 6,12,17,23, GND 29,31,39,48,52 W83195BR-202/W83195BG-202 Real time input pin to change frequency to a pre-programmed, Active low, Over clock entry by I tp120k internal 120K pull up. 2 Serial data 2-wire control interface with internal pull-up I/O resistor. 2 Serial clock 2-wire control interface with internal pull-up IN resistor ...
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... W83195BR-202/W83195BG-202 FS0 CPU (MHZ) PCIE (MHZ) 0 266.66 100.00 1 133.34 100.00 0 200.01 100.00 1 166.75 100.05 0 333.35 111.12 1 100.00 100.00 0 400.01 100.00 1 200.01 100.00 0 269.36 101.01 1 134.68 101 ...
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... W83195BR-202/W83195BG-202 DESCRIPTION Frequency selection by software via I Enable software frequency table selection SSEL [4:0 Select frequency by hardware. 1= Select frequency by software I Enable Spread Spectrum in the frequency table Normal 1 = Spread Spectrum enabled Enable reload safe frequency when the watchdog is timeout reload the FS [4:0] latched pins when watchdog time out. ...
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... Reserved Reserved 1 0 Reserved 1 W83195BR-202/W83195BG-202 DESCRIPTION Reserved Reserved Reserved Reserved PCI6 output control PCI5 output control PCI4 output control PCI3 output control DESCRIPTION PCI2 output control PCI1 output control PCI0 output control AGP2 output control Reserved ...
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... NAME PWD 7 Reserved 1 6 33, 35, 37, 41, 43, 46, Reserved 0 W83195BR-202/W83195BG-202 DESCRIPTION DESCRIPTION Reserved PCIEXT5/C5 output control PCIEXT4/C4 output control PCIEXT3/C3 output control PCIEXT2/C2 output control PCIEXT1/C1 output control PCIEXT0/C0 output control Reserved - 9 - TYPE R/W R/W R R/W TYPE R/W R/W R/W R/W R/W R/W R/W R/W Publication Release Date: Apr. 2006 ...
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... N_DIV [ N_DIV [ N_DIV [ N_DIV [4] 1 Programmable N divisor value bit 7 ~0. The bit 8 is defined in Register 8. 3 N_DIV [ N_DIV [ N_DIV [ N_DIV [0] 0 W83195BR-202/W83195BG-202 DESCRIPTION Winbond Chip ID. Winbond Chip ID. DESCRIPTION DESCRIPTION - 10 - TYPE TYPE R/W R/W R/W R/W R/W R/W R/W R/W ...
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... X 3 Reserved X 2 KVAL2 X 1 KVAL1 X W83195BR-202/W83195BG-202 DESCRIPTION Enable PCIEX spread spectrum feature,1: Enable, 0: Disable Programmable N3 divisor 6~0 for programmable PCIEX clock. The N3VAL<8>, N3VAL<7> default value is 1. VCO =14.318MHz*(N+4)/ 56. DESCRIPTION Spread Spectrum Up Counter bit 3 ~ bit 0. Spread Spectrum Down Counter bit 3 ~ bit 0 2’ ...
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... CPUT / PCIE_T output state in during STOP Mode assertion. 7 DRI_CONT 0 1: Driven (6*Iref), 0: Tristate (Floating) Complementary parts always tri-state (floating) in power down or stop mode. 6 Reserved 0 Reserved W83195BR-202/W83195BG-202 00 01 Div2 Div3 Div8 Div8 DESCRIPTION 0: Output frequency depend on frequency table 1: Program all clock frequency by changing M/N value The equation is VCO =14 ...
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... CSKEW [1] 0 The decision of skew direction is same as CSKEW<2:0> setting 3 CSKEW [ PSKEW [2] 1 CPU1 to PCI skew control, Skew resolution is 300ps 1 PSKEW [1] 0 The decision of skew direction is same as PSKEW [2:0] setting 0 PSKEW [0] 0 W83195BR-202/W83195BG-202 DESCRIPTION DESCRIPTION 1% 0.5% DESCRIPTION Publication Release Date: Apr. 2006 - 13 - TYPE R/W R/W R/W R/W R/W R/W TYPE R/W ...
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... Reserved 0 5 PEXSKEW [ PEXSKEW [ PEXSKEW [ Reserved 0 1 Reserved 1 0 Reserved 0 W83195BR-202/W83195BG-202 DESCRIPTION DESCRIPTION DESCRIPTION Reserved Reserved CPU1 to PCIEX skew control, Skew resolution is 300ps The decision of skew direction is same as PEXSKEW<2:0> setting Reserved Reserved Reserved - Enable 0: Disable TYPE R/W R/W R/W R/W R/W R/W ...
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... FIX_ADDR<1> 1 FIX_ADDR<1:0> => 00 36MHz 0 FIX_ADDR<0> 1 10: Reserved W83195BR-202/W83195BG-202 DESCRIPTION Reserved Setting the down count depth (Failure decision). One bit resolution represents 250ms. Default time depth is 8*250ms = 2.0 second. If the watchdog timer is counting, this register will return present down count value. DESCRIPTION 32MHz ...
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... W83195BR-202 is provided Block Read/Block Write and Byte-Data Read/Write protocol. The I address is defined at 0xD2. Block Read and Block Write Protocol 8.1 Block Write protocol 8.2 Block Read protocol ## In block mode, the command code must filled 8’h00 8.3 Byte Write protocol 8.4 Byte Read protocol W83195BR-202/W83195BG-202 2 C Serial Bus for microprocessor to read/write internal registers. In the - ...
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... Input ESD protection (Human body model) 9.2 General Operating Characteristics VDDREF =VDDA=VDDCPU=VDDPCI=VDD48= 3.3V PARAMETER SYMBOL Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Operating Supply Current Input pin capacitance Output pin capacitance Input pin inductance W83195BR-202/W83195BG-202 ± MIN MAX UNITS ...
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... Change in DIFF -150 V Magnitude DIFF_DC V : Common Mode CM 1.05 Voltage ΔV : Change CM -200 Common Voltage Duty Cycle 45 Cycle to Cycle Jitter Frequency Stabilization from Power-up (cold 0 start) W83195BR-202/W83195BG-202 ± MIN TYP MAX UNITS 250 ps 500 ps 500 Ps 500 ps 500 ps 500 ps 1000 ps 500 ps ° ...
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... Pull-Up Current Min Pull-Up Current Max Pull-Down Current Min Pull-Down Current Max 9.6 PCI Electrical Characteristics ± VDDPCI= 3. PARAMETER Rise Edge Rate Fall Edge Rate Cycle to Cycle jitter W83195BR-202/W83195BG-202 V DIFF ° ° +70 C, Test load, Cl=10pF, MIN MAX UNIT ...
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... Pull-Up Current Max Pull-Down Current Min Pull-Down Current Max 9.8 REF Electrical Characteristics ± VDDREF= 3. PARAMETER Rise Edge Rate Fall Edge Rate Cycle to Cycle jitter W83195BR-202/W83195BG-202 MIN MAX UNITS Measured using the JIT2 software -1000 1000 ps package Measured on rising and falling edge ...
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... Voh=0.525V, Vr=475, IREF=2.32mA, Ioh=6*IREF PARAMETER Rise Time Fall Time Absolute crossing point Voltages Voltage High Voltage Low Cycle to Cycle jitter Duty Cycle W83195BR-202/W83195BG-202 ° ° +70 C, Test load, Cl=10pF, MIN MAX UNITS Measured using the JIT2 software -1000 ...
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... A: IC revision SA: mask version All the trademarks of products and companies mentioned in this data sheet belong to their respective owners. W83195BR-202/W83195BG-202 PACKAGE TYPE 56 PIN SSOP Commercial, 0°C to +70°C 56 PIN SSOP Commercial, 0°C to +70°C (Pb-free package) W83195BG-202 28051234 501 - 22 - PRODUCTION FLOW GBASA ...
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... SIDE VIEW c θ DETAIL"A" Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. W83195BR-202/W83195BG-202 SYMBOL .045 .055 A A1 END VIEW SEE DETAIL " ...
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... Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. W83195BR-202/W83195BG-202 Important Notice - 24 - ...