w83195bg-341 Winbond Electronics Corp America, w83195bg-341 Datasheet - Page 6

• Manufacturer Part Number: w83195bg-341
• Description: Winbond Clock Generator For Via P4/kt Series Chipset
• Manufacturer: Winbond Electronics Corp America

3. PIN CONFIGURATION
4.
#: Active low
*: Internal pull up resistor 120KΩ to VDD
&
: Internal Pull-down resistor 120KΩ to GND
BLOCK DIAGRAM
V T T _ P W R G D #
C L K _ S T O P # *
P C I_ S T O P # *
S E L S D _ D D
M U L T S E L *
S E L P 4 _ K 7 *
S D A T A *
B U F _ IN
F S (0 :3 )
X O U T
S C L K *
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
P D # *
X IN
&
S E L S D _ D D
S E L P 4 _ K 7 * /A G P 1
M U L T S E L * /P C I2
F S 2
P D # * /R E S E T #
&
F S 3
F S 1
/2 4 _ 4 8 M H z
F S 0 * /R E F 0
V D D A G P
S D A T A *
V D D P C I
&
&
V D D 4 8
/4 8 M h z
S C L K *
/P C I_ F
&
X O U T
A G P 0
A G P 2
/P C I1
G N D
G N D
G N D
G N D
V D D
G N D
IR E F
X T A L
P C I3
P C I4
P C I5
P C I6
M /N /R a tio
& C o n fig
P L L 2
I n te rf a c e
& P O R
R e g is te r
X IN
O S C
S p e c tru m
C o n tro l
L a tc h
L o g ic
S p re a d
R O M
P L L 1
I 2 C
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
1
2
3
4
5
6
7
8
9
V C O C L K
- 2 -
D ivid er
D iv id e r
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
V T T _ P W R G D # /R E F 1
V D D R
G N D
C P U T /C P U O D _ T
C P U C /C P U O D _ C
V D D C
V D D I
C P U C S _ C
C P U C S _ T
G N D
F B O U T
B U F _ IN
D D R T 0 /S D R A M 0
D D R C 0 /S D R A M 1
D D R T 1 /S D R A M 2
D D R C 1 /S D R A M 3
V D D D
G N D
D D R T 2 /S D R A M 4
D D R C 2 /S D R A M 5
D D R T 3 /S D R A M 6
D D R C 3 /S D R A M 7
V D D D
G N D
D D R T 4 /S D R A M 8
D D R C 4 /S D R A M 9
D D R T 5 /S D R A M 1 0
D D R C 5 /S D R A M 1 1
2
6
3
6
6
R E F 0 :1
S D R A M (1 ,3 ,5 ,7 ,9 ,1 1 )
S D R A M ( 0 ,2 ,4 ,6 ,8 ,1 0 )
2 4 _ 4 8 M H z
C P U C S _ C
R E S E T #
C P U C S _ T
4 8 M H z
F B O U T
P C I 1 :6
C P U T /C P U O D _ T
C P U C /C P U O D _ C
R re f
P C I _ F
A G P ( 0 :2 )
D D R C ( 0 :5 ) /
D D R T ( 0 :5 ) /