w83194br-619 Winbond Electronics Corp America, w83194br-619 Datasheet - Page 19

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w83194br-619

Manufacturer Part Number
w83194br-619
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.18 Register 15: Control Register (Default =3AH)
7.19 Register 16: Control Register (Default =24H)
7.20 Register 17: Slew Rate Control Register (Default =55H)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
AGP_32_S2
AGP_32_S1
AGP_10_S2
AGP_10_S1
PCI_F2_S2
PCI_F2_S1
PCI_F0_S2
PCI_F0_S1
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
SSKEW [2]
SSKEW [1]
SSKEW [0]
PSKEW [2]
PSKEW [1]
PSKEW [0]
ASKEW [2]
ASKEW [1]
ASKEW [0]
INV_AGP
INV_CPU
INV_PCI
Reserve
Reserve
SPSP1
SPSP0
NAME
NAME
NAME
PWD
PWD
PWD
0
0
1
1
1
1
0
0
0
0
1
0
0
1
0
0
0
1
0
1
0
1
0
1
Invert the CPU phase 0: Default, 1: Inverse
Reserved
Reserved
Spread Spectrum type select.
CPU to AGP skew control.
The decision of skew direction is same as ASKEW [2:0] setting
Invert the AGP phase 0: Default, 1: Inverse
Invert the PCI phase 0: Default, 1: Inverse
CPU to SRC skew control,
The decision of skew direction is same as SSKEW [2:0] setting
CPU to PCI skew control,
The decision of skew direction is same as PSKEW [2:0] setting
PCI_F2 slew rate control
11: Strong, 00: Weak, 10/01: Normal
PCI_F1 / PCI_F0 slew rate control
11: Strong, 00: Weak, 10/01: Normal
3V66_3 / 3V66_2 slew rate control
11: Strong, 00: Weak, 10/01: Normal
3V66_1 / 3V66_0 slew rate control
11: Strong, 00: Weak, 10/01: Normal
00: Down 1%
01: Down 0.5%
10: Center ± 0.5%
11: Center ± 0.25%
W83194BR-619/W83194BG-619
- 15 -
Skew resolution is 300ps
Skew resolution is 300ps
Skew resolution is 300ps
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: March, 2006
Revision 0.7

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