mpc961p Integrated Device Technology, mpc961p Datasheet - Page 9

• Manufacturer Part Number: mpc961p
• Description: Lvpecl-input Lvcmos-ouput 200-mhz Low Voltage Clock Zero Delay Buffer
• Manufacturer: Integrated Device Technology

IDT™ Low Voltage Zero Delay Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC961P
Low Voltage Zero Delay Buffer
MPC961P
500
PCLK
PCLK
Ext_FB
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs
The deviation in t
mean in a random sample of cycles
The time from the PLL controlled edge to the non controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage
PCLK
PCLK
Ext_FB
Figure 12. Propagation Delay (t
Figure 14. Output Duty Cycle (DC)
Figure 16. Cycle-to-Cycle Jitter
0
offset) Test Reference
for a controlled edge with respect to a T
t
T
P
N
Figure 18. I/O Jitter
t
(∅)
T
T
0
N+1
DC = t
V
PP
P
/T
T
JIT(∅)
0
T
x 100%
JIT(CC)
∅
, static phase
= |T
= |T
0
–T
N
1
–T
mean|
N+1
V
V
GND
CC
CC
V
V
V
GND
|
CMR
CC
CC
÷ 2
0
÷ 2
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
9
The deviation in cycle time of a signal with respect to the ideal
period over a random sample of cycles
The pin-to-pin skew is defined as the worst case difference
in propagation delay between any similar delay path within a
single device
t
F
Figure 15. Output-to-Output Skew t
Figure 13. Output Transition Time Test
T
0
Figure 17. Period Jitter
Reference
t
SK(O)
t
T
R
JIT(PER)
V
CC
0.55
= 3.3 V
2.4
= |T
N
–1/f
SK(O)
V
0
CC
|
V
V
GND
V
V
GND
1.8 V
0.6 V
= 2.5 V
CC
CC
CC
CC
NETCOM
÷ 2
÷ 2
MPC961P