pc8477b National Semiconductor Corporation, pc8477b Datasheet - Page 9

• Manufacturer Part Number: pc8477b
• Description: Advanced Floppy Disk Controller
• Manufacturer: National Semiconductor Corporation

3 0 Register Description
The following PC8477B registers are mapped into the ad-
dresses shown below with the base address range being
provided by the CS pin For PC-AT or PS 2 applications the
diskette controller primary address range is 3F0 to 3F7
(hex) and the secondary address range is 370 to 377 (hex)
The PC8477B supports three different register modes the
3 1 STATUS REGISTER A (SRA) Read Only
This is a read only diagnostic register that is part of the
PS 2 floppy controller register set and is enabled when in
the PS 2 or Model 30 mode This register monitors the state
of the INT pin and some of the disk interface signals The
state of these bits is independent of the INVERT pin The
SRA can be read at any time when in PS 2 mode In the
PC-AT mode D7 – D0 are TRI-STATE during a mP read
3 1 1 SRA PS 2 Mode
D7
D6
D5
D4
D3
D2
D1
D0
DESC
RESET
COND
PEND
INT
D7
0
Note SRA and SRB are enabled by IDENT
Interrupt Pending This active high bit reflects
the state of the INT pin
2nd Drive Installed Active low status of the
DRV2 disk interface input indicating if a second
drive has been installed
Step Active high status of the STEP disk inter-
face output
Track 0 Active low status of the TRK0 disk in-
terface input
Head Select Active high status of the HDSEL
disk interface output
Index Active low status of the INDEX disk in-
terface input
Write Protect Active low status of the WP disk
interface input
Direction Active high status of the DIR disk in-
terface output
A2
0
0
0
0
1
1
1
1
1
1
DRV2 STEP TRK0 HDSEL INDX WP DIR
N A
D6
D5
A1
0
0
0
1
1
0
0
0
1
1
1
N A
D4
A0
0
1
0
1
0
0
1
0
1
1
TABLE 3-1 Register Description and Addresses
D3
0
IDENT
N A N A 0
D2
e
0
0
X
X
X
X
X
X
X
X
0 during a chip reset only
D1 D0
R W
R W
R W
R W
W
W
R
R
R
X
R
9
PC-AT mode PS 2 mode (Models 50 60 80) and the Mod-
el 30 mode (Model 30) See Section 5 1 for more details on
how each register mode is enabled When applicable the
register definition for each mode of operation will be given
If no special notes are made then the register is valid for all
three register modes
3 1 2 SRA
D7
D6
D5
D4
D3
D2
D1
D0
3 2 STATUS REGISTER B (SRB) Read Only
This is a read only diagnostic register that is part of the
PS 2 floppy controller register set and is enabled when in
the PS 2 or Model 30 mode The state of these bits is inde-
pendent of the INVERT pin The SRB can be read at any
time when in PS 2 mode In the PC-AT mode D7 – D0 are
TRI-STATE during a mP read
RESET
COND
DESC
Status Register A
Status Register B
Digital Output Register
Tape Drive Register
Main Status Register
Data Rate Select Register
Data Register (FIFO)
None (Bus TRI-STATE)
Digital Input Register
Configuration Control Register
PEND
INT
D7
0
Interrupt Pending This active high bit reflects
that state of the INT pin
DMA Request Active high status of the DRQ
signal
Step Active high status of the latched STEP
disk interface output This bit is latched with the
STEP output going active and is cleared with a
read from the DIR or with a hardware or soft-
ware reset
Track 0 Active high status of TRK0 disk inter-
face input
Head Select Active low status of the HDSEL
disk interface output
Index Active high status of the INDEX disk in-
terface input
Write Protect Active high status of the WP
disk interface input
Direction Active low status of the DIR disk in-
terface output
Model 30 Mode
DRQ STEP TRK0 HDSEL INDX WP DIR
D6
0
Register
D5
0
N A
D4
D3
1
FIFO
DOR
MSR
SRA
SRB
TDR
DSR
CCR
DIR
N A N A 1
D2
D1 D0