ics9342 Holt Integrated Circuits, Inc., ics9342 Datasheet

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ics9342

Manufacturer Part Number
ics9342
Description
133mhz Clock Generator Integrated Buffer Powerpc
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet

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133MHz Clock Generator and Integrated Buffer for PowerPC™
Third party brands and names are the property of their respective owners.
Recommended Application:
Power PC System Clock
Output Features:
Features:
Key Specifications:
Block Diagram
OUTSEL (1:0)
9342 Rev E 9/06/00
BOOST#
SS_EN#
12- CPUs @ 3.3V, up to 146MHz
1- PCIREF @ 3.3V, up to 73MHz
1 - OUT 3.3V, 64MHz
1 - OUT/2 3.3V, OUT/2MHz
2 - REF @ 3.3V, 14.318MHz
Up to 146MHz frequency support
Support power management: CPU, PCI stop and power
down mode.
Spread spectrum for EMI control (0 to -0.5%, ± 0.25%).
Uses external 14.318MHz crystal
FS pins for frequency select
Support for industrial temperature range (-40C° to 85C°)
CPU Output Skew: <200ps
CPU - PCI Output Skew: <500ps
CPU Output Jitter: <150ps
PCI Output Jitter: <500ps
FS (2:0)
PDFP#
TEST#
PD#
X2
X1
Integrated
Circuit
Systems, Inc.
XTAL
OSC
Spectrum
PLL2
Spread
Control
Config.
PLL1
Logic
Reg.
DIVDER
DIVDER
CPU
PCI
/ 2
Stop
Stop
2
12
OUT
OUT/DIV2
PCIREF
CPUCLK (11:0)
REF (1:0)
Functionality
T
E
1
1
1
1
1
1
1
1
S
T
*BOOST#/OUT_DIV2
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
*CPU-STOP#
F
*TEST#/OUT
*PCI_STOP#
S
0
0
0
0
1
1
1
1
2
GNDREF
*SS_EN#
VDDREF
GNDPCI
VDDPCI
PCIREF
*PDFP#
GNDFP
VDDFP
VDDA
REF1
REF0
*PD#
GND
*FS0
*FS1
*FS2
VDD
X1
X2
F
48-Pin 300mil SSOP
S
0
0
0
0
1
1
1
1
Pin Configuration
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
F
S
0
0
0
0
1
1
1
1
0
3 1
0 1
3 1
0 1
6
6
M
8
8
C
. 6
. 6
. 3
. 3
P
. 3
. 0
. 3
. 0
H
6 6
6 6
3 3
3 3
U
0 0
0 0
3 3
3 3
z
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
3
3
3
3
6
6
6
6
M
P
. 3
. 3
. 3
. 3
. 6
. 6
. 6
. 6
ICS9342
I C
H
3 3
3 3
3 3
3 3
6 6
6 6
6 6
6 6
z
OUTSEL1*
VDDCPU
GNDCPU
CPU0
CPU1
CPU2
VDDCPU
GNDCPU
CPU3
CPU4
CPU5
VDDCPU
GNDCPU
CPU6
CPU7
CPU8
VDDCPU
GNDCPU
CPU9
CPU10
CPU11
VDDCPU
GNDCPU
OUTSEL0*
4 1
4 1
4 1
4 1
4 1
4 1
4 1
4 1
M
R
3 .
3 .
3 .
3 .
3 .
3 .
3 .
3 .
E
H
F
8 1
8 1
8 1
8 1
8 1
8 1
8 1
8 1
z

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ics9342 Summary of contents

Page 1

... ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. ICS9342 1 48 OUTSEL1* ...

Page 2

... ICS9342 General Description The ICS9342 generates all clocks required for high speed PowerPC RISC microprocessor systems. With a zero delay buffer chip such as the ICS9112-17 multiple PCI clock outputs can be generated in phase with PCIREF. Spread Spectrum may be enabled by driving the SS_EN# pin low. Spread spectrum typically reduces system EMI by 8dB to 10dB ...

Page 3

... ICS9342 ...

Page 4

... ICS9342 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . . . . -40°C to +85°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...

Page 5

... L CONDITIONS *(0. *( ICS9342 M IN TYP M AX UNITS 13 13 2.4 V 0.32 0.4 V - 187 200 ps 95 150 ps ...

Page 6

... ICS9342 Electrical Characteristics - REF, OUT , OUT / 70º 3.3 V +/-5 ETER SYM BOL Output Impedance Output High Voltage V Output Low Voltage V Output High Current I Output Low Current I 1 Ris e Time 1 REF Fall Time ...

Page 7

... Shared Pin Operation - Input/Output Pins The I/O pins designated by (input/output) on the ICS9342 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on these pins at this time is read and stored into a 5-bit internal data latch. At the end of Power-On reset, (see AC characteristics for timing values), the device changes the mode of operations for these pins to an output function ...

Page 8

... Crystal Notes: 1. All timing is referenced to the Internal CPU (defined as inside the ICS9342 device shown, the outputs Stop Low on the next falling edge after PD# goes low asynchronous input and metastable conditions may exist. This signal is synchronized inside this part. ...

Page 9

... CPU_STOP# PCI_STOP# PD# PCIREF (externall) Notes: 1. All timing is referenced to CPUCLK. 2. Internal means inside the chip. 3. All other clocks continue to run undisturbed. 4. PD# and CPU_STOP# are shown in a high state. Third party brands and names are the property of their respective owners. ICS9342 ...

Page 10

... ICS9342 Ordering Information ICS9342yF-T Example: ICS XXXX PPP - T Third party brands and names are the property of their respective owners. SYMBOL VARIATIONS Designation for tape and reel packaging Pattern Number ( digit number for parts with ROM code patterns) ...

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