s908gr16ag4cfj Freescale Semiconductor, Inc, s908gr16ag4cfj Datasheet - Page 62

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s908gr16ag4cfj

Manufacturer Part Number
s908gr16ag4cfj
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock Generator Module (CGM)
62
10. Verify the choice of N, E, and L by comparing f
11. Program the PLL registers accordingly:
4. Select a VCO frequency multiplier, N.
5. Calculate and verify the adequacy of the VCO and bus frequencies f
6. Select the VCO’s power-of-two range multiplier E, according to
7. Select a VCO linear range multiplier, L, where f
8. Calculate and verify the adequacy of the VCO programmed center-of-range frequency, f
9. For proper operation,
center-of-range frequency is the midpoint between the minimum and maximum frequencies
attainable by the PLL.
f
to f
VCLK
a. In the VPR bits of the PLL control register (PCTL), program the binary equivalent of E.
b. In the PLL multiplier select register low (PMSL) and the PLL multiplier select register high
c. In the PLL VCO range select register (PMRS), program the binary coded equivalent of L.
VCLK
(PMSH), program the binary equivalent of N. If using a 1–8 MHz reference, the PMSL register
must be reprogrammed from the reset value before enabling the PLL.
must be within the application’s tolerance of f
.
Exceeding the recommended maximum bus frequency or VCO frequency
can crash the MCU.
1. Do not program E to a value of 3.
Table 4-2. Power-of-Two Range Selectors
16 MHz< f
MC68HC908GR16A Data Sheet, Rev. 1.0
8 MHz< f
Frequency Range
0 < f
N
L = Round
f
VRS
VCLK
=
f
VCLK
f
VCLK
f
VCLK
VRS
BUS
round
≤ 8 MHz
f
≤ 16 MHz
VCLK
= (L x 2
≤ 32 MHz
=
=
NOTE
( ) f
(
f
------------------------- -
N
f
VCLKDES
VCLK
f
2
VCLK
RCLK
NOM
E
×
E
f
-------------------------- -
f
NOM
) f
VCLK
x f
VCLKDES
RCLK
) 4 ⁄
NOM
= 71.4 kHz
to f
NOM
2
×
VRS
2
E
, and f
and f
Table
VRS
VCLKDES
2
E
0
1
(1)
VCLK
must be as close as possible
4-2.
. For proper operation,
and f
Freescale Semiconductor
BUS
.
VRS
. The

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