s908gr16ag4cfj Freescale Semiconductor, Inc, s908gr16ag4cfj Datasheet - Page 213

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s908gr16ag4cfj

Manufacturer Part Number
s908gr16ag4cfj
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
As an example, the divider is 16,384 with a 4.9152 MHz crystal, the TBMCLKSEL set for divide-by-128,
and TBR2–TBR0 set to {011}. The interrupt period is:
17.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
17.6.1 Wait Mode
The timebase module remains active after execution of the WAIT instruction. In wait mode the timebase
register is not accessible by the CPU.
If the timebase functions are not required during wait mode, reduce the power consumption by stopping
the timebase before executing the WAIT instruction.
17.6.2 Stop Mode
The timebase module may remain active after execution of the STOP instruction if the internal clock
generator has been enabled to operate during stop mode through the OSCENINSTOP bit in the
configuration register. The timebase module can be used in this mode to generate a periodic wakeup from
stop mode.
If the internal clock generator has not been enabled to operate in stop mode, the timebase module will
not be active during stop mode. In stop mode, the timebase register is not accessible by the CPU.
If the timebase functions are not required during stop mode, reduce power consumption by disabling the
timebase module before executing the STOP instruction.
Freescale Semiconductor
16,384/4.9152 x 10
Do not change TBR2–TBR0 bits while the timebase is enabled (TBON = 1).
TBR2
6
0
0
0
0
1
1
1
1
= 3.33 ms
Table 17-1. Timebase Divider Selection
MC68HC908GR16A Data Sheet, Rev. 1.0
TBR1
0
0
1
1
0
0
1
1
TBR0
0
1
0
1
0
1
0
1
NOTE
32,768
8192
2048
128
64
32
16
0
8
TBMCLKSEL
Divider
4,194,304
1,048,576
262144
16,384
8192
4096
2048
1024
1
Low-Power Modes
213

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