LTC6903 Linear Technology, LTC6903 Datasheet - Page 9

• Manufacturer Part Number: LTC6903
• Description: (LTC6903 / LTC6904) 1kHz - 68MHz Serial Port Programmable Oscillator
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
Serial Port Register Description
OCT[3:0] - Frequency Divider Setting. (See Frequency
Setting Section)
DAC[9:0] - Master Oscillator Frequency Setting. (See
Frequency Setting Section)
CNF[1:0] - Output Configuration - This controls outputs
CLK and CLK according to Table 2.
LTC6903 SPI Compatible Interface
A serial data transfer is composed of sixteen (16) bits of
data labeled D15 through D0. D15 is the first bit of data
presented in each transaction. All serial port register bits
are set LOW on power-up.
TI I G DIAGRA S
SDA
SCL
W U
START
0
0
1
0
0
2
SDA
SCL
t
HD, STA
1
1
3
CONDITION
U
Typical LTC6904 Input Waveform—Programming Frequency to 68MHz (ADR Pin Set LOW)
ADDRESS
START
0
0
4
1
1
5
U
t
W
LOW
1
1
6
ADR
t
r
1
7
t
HIGH
t
SU, DAT
WR
W
0
8
t
f
ACK
9
OCT3 OCT2 OCT1 OCT0 DAC9 DAC8 DAC7 DAC6
1
1
t
HD, DAT
U
Timing Diagram (LTC6904)
1
2
1
3
1
4
REPEATED START
CONDITION
1
5
Writing Data (LTC6903 Only)
When the SEN line is brought LOW, serial data presented
on the SDI input is clocked in on the rising edges of SCK
until SEN is brought HIGH. On every eighth rising edge of
SCK, the preceding 8-bits of data are clocked into the
internal register. It is therefore possible to clock in only the
8 {D15 - D8} most significant bits of data rather than
completing an entire transfer.
The serial data transfer starts with the most significant bit
and ends with the least significant bit of the data, as shown
in the timing diagram.
1
6
t
SU, STA
1
7
t
HD, STA
1
8
ACK
9
DAC5 DAC4 DAC3 DAC2 DAC1 DAC0 CNF1 CNF0
1
1
LTC6903/LTC6904
1
2
CONDITION
1
3
STOP
1
4
t
SU, STO
t
BUF
1
5
CONDITION
START
1
6
6903 TD02
0
7
0
8
ACK
9
69034fa
STOP
9
6903 TD03