LTC6903 Linear Technology, LTC6903 Datasheet - Page 7

• Manufacturer Part Number: LTC6903
• Description: (LTC6903 / LTC6904) 1kHz - 68MHz Serial Port Programmable Oscillator
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
Table 1. Output Frequency Range vs OCT Setting
(Frequency Resolution 0.001 • f)
For example, to set a frequency of 6.5MHz, first look at
Table 1 to find an OCT value. 6.5MHz falls between
4.25MHz and 8.5MHz yielding an OCT value of 12 or 1100.
Substituting the OCT value of 12 and the desired frequency
of 6.5MHz into the previous equation results in:
Rounding 707.113 to the nearest integer yields a DAC
value of 707 (or a 10-bit digital word of 1011000011.)
Power Up State
When power is first applied to the LTC6903/LTC6904, all
register values are automatically reset to 0. This results in
an output frequency of 1.039kHz with both outputs active.
Output Spectrum
In most frequency ranges, the output of the LTC6903/
LTC6904 is generated as a division of the higher internal
DAC
34.05MHz
17.02MHz
8.511MHz
4.256MHz
2.128MHz
1.064MHz
33.25kHz
16.62kHz
8.312kHz
4.156kHz
2.078kHz
1.039kHz
66.5kHz
532kHz
266kHz
133kHz
2048
f
–
2078
U
6 5 6
( ) •
Hz
.
U
e Hz
( )
2
(
10 12
68.03MHz
34.01MHz
17.01MHz
8.503MHz
4.252MHz
2.126MHz
531.4kHz
265.7kHz
132.9kHz
66.43kHz
33.22kHz
16.61kHz
8.304kHz
4.152kHz
2.076kHz
1063kHz
f <
W
)
707 113
.
U
OCT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
clock frequency. This helps to minimize jitter and sub-
harmonics at the output of the device. In the highest
frequency ranges, the division ratio is reduced, which will
result in greater cycle-to-cycle jitter as well as spurs at the
internal sampling frequency. Because the internal control
loop runs at 1MHz to 2MHz without regard to the output
frequency, output spurs separated from the set frequency
by 1MHz to 2MHz may be observed. These spurs are
characteristically more than 30dB below the level of the set
frequency.
Frequency Settling
When frequency settings change, the settling time and
shape differ depending on which bits are changed. Chang-
ing only the OCT bits will result in an instantaneous change
in frequency for OCT values below 10. Values of 10 and
above may take up to 100 s to settle due to the action of
internal power conservation circuitry.
Changing the DAC bits will result in a smooth transition
between the frequencies, occupying at most 100 s, with
little overshoot.
Changing both the OCT and DAC bits simultaneously may
result in considerable excursion beyond the frequencies
requested before settling.
It should be noted that changing the DAC bits at the lower
frequency ranges will result in a seemingly instantaneous
frequency change because the settling time depends on
the internal loop frequency rather than the set frequency.
Power Supply Bypass
In order to obtain the accuracies represented in this
datasheet, it is necessary to provide excellent bypass on
the power supply. Adequate bypass is a 1 F capacitor in
parallel with a 0.01 F capacitor connected within a few
millimeters of the power supply leads.
Monotonicity and Linearity
The DAC in the LTC6903/LTC6904 is guaranteed to be
10-bit monotonic. Nonlinearity of the DAC is less than 1%.
LTC6903/LTC6904
69034fa
7