LTC3738 Linear Technology, LTC3738 Datasheet - Page 16

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LTC3738

Manufacturer Part Number
LTC3738
Description
3-Phase Buck Controller
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
LTC3738
The curve is generated by forcing a constant input current
into the gate of a common source, current source loaded
stage and then plotting the gate voltage versus time. The
initial slope is the effect of the gate-to-source and the gate-
to-drain capacitance. The flat portion of the curve is the
result of the Miller capacitance effect of the drain-to-
source capacitance as the drain drops the voltage across
the current source load. The upper sloping line is due to
the drain-to-gate accumulation capacitance and the gate-
to-source capacitance. The Miller charge (the increase in
coulombs on the horizontal axis from a to b while the curve
is flat) is specified for a given V
adjusted for different V
ratio of the application V
values. A way to estimate the C
change in gate charge from points a and b on a manufac-
turers data sheet and divide by the stated V
specified. C
for determining the transition loss term in the top MOSFET
but is not directly specified on MOSFET data sheets. C
and C
parameters are not included.
When the controller is operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
16
V
Main Switch Duty Cycle
Synchronous Switch Duty Cycle
GS
OS
C
are specified sometimes but definitions of these
MILLER
a
MILLER EFFECT
MILLER
Figure 4. Gate Charge Characteristic
= (Q
Q
IN
B
– Q
is the most important selection criteria
U
A
)/V
b
DS
DS
U
DS
voltages by multiplying by the
=
to the curve specified V
DS
V
V
MILLER
OUT
IN
drain voltage, but can be
V
W
GS
=
V
term is to take the
V
IN
V
3738 F04
IN
DS
U
V
V
OUT
DS
voltage
V
RSS
IN
DS
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
where N is the number of output stages, δ is the tempera-
ture dependency of R
resistance (approximately 2Ω at V
drain potential and the change in drain potential in the
particular application. V
typical gate threshold voltage specified in the power
MOSFET data sheet. C
using the gate charge curve from the MOSFET data sheet
and the technique described above.
Both MOSFETs have I
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
high current efficiency generally improves with larger
MOSFETs, while for V
rapidly increase to the point that the use of a higher
R
efficiency. The synchronous MOSFET losses are greatest
at high input voltage when the top switch duty factor is low
or during a short circuit when the synchronous switch is
on close to 100% of the period.
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
DS(ON)
P
P
SYNC
MAIN
device with lower C
=
=
V
V
V
V
IN
IN
OUT
V
IN
CC
2
V
I
IN
MAX
V
2
N
OUT
I
MAX
V
1
2
N
DS(ON)
TH MIN
MILLER
R losses while the topside N-channel
(
R
(
TH(MIN)
DS(ON)
IN
DR
I
MAX
2
N
> 12V, the transition losses
(
)(
, R
)
1
RSS
is the calculated capacitance
C
+
+
DR
MILLER
vs temperature curve, but
δ
is the data sheet specified
2
V
actually provides higher
)
(
TH MIN
is the effective top driver
1
R
GS
+
(
DS ON
1
= V
δ
)
(
)
)
R
MILLER
)
DS ON
( )
+
f
(
IN
), V
)
< 12V, the
IN
is the
3738f

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