HEF4013BP,652 NXP Semiconductors, HEF4013BP,652 Datasheet - Page 6

• Manufacturer Part Number: HEF4013BP,652
• Description: IC FLIP FLOP DUAL D TYPE 14DIP
• Manufacturer: NXP Semiconductors
• Series: 4000Br
• Type: D-Typer

Specifications of HEF4013BP,652

• Package / Case: 14-DIP (0.300", 7.62mm)
• Function: Set(Preset) and Reset
• Output Type: Differential
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 40MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 3.4mA, 3.4mA
• Voltage - Supply: 3 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Number Of Circuits: 2
• Logic Family: HE4000B
• Logic Type: D-Type Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 90 ns
• High Level Output Current: - 4.2 mA
• Low Level Output Current: 4.2 mA
• Supply Voltage (max): 15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 3 V
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 3.3/5/9/12V
• Package Type: DIP
• Frequency (max): 40MHz
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 15V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Through Hole
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1684-5; 933277610652; HEF4013BPN

NXP Semiconductors
11. Dynamic characteristics
Table 7.
T
HEF4013B_6
Product data sheet
Symbol Parameter
t
t
t
t
t
t
PHL
PLH
t
su
h
W
amb
= 25 C; unless otherwise specified. For test circuit see
HIGH to LOW
propagation delay
LOW to HIGH
propagation delay
transition time
set-up time
hold time
pulse width
Dynamic characteristics
Conditions
nCP to nQ, nQ;
see
nSD to nQ
nCD to nQ
nCP to nQ, nQ;
see
nSD to nQ
nCD to nQ
see
nD to nCP;
see
nD to nCP;
see
nCP input LOW;
see
nSD input HIGH;
see
nCD input HIGH;
see
Figure 4
Figure 4
Figure 4
Figure 4
Figure 4
Figure 4
Figure 5
Figure 5
Rev. 06 — 27 October 2009
V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
DD
Figure
[1]
[1]
[1]
[1]
[1]
[1]
[1]
6.
Extrapolation formula Min
83 + 0.55
34 + 0.23
22 + 0.16
73 + 0.55
29 + 0.23
22 + 0.16
73 + 0.55
29 + 0.23
22 + 0.16
68 + 0.55
29 + 0.23
22 + 0.16
48 + 0.55
24 + 0.23
17 + 0.16
33 + 0.55
19 + 0.23
12 + 0.16
10 + 1.00
9 + 0.42
6 + 0.28
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
40
25
15
20
20
15
60
30
20
50
24
20
50
24
20
HEF4013B
Dual D-type flip-flop
Typ
110
100
100
© NXP B.V. 2009. All rights reserved.
45
30
40
30
40
30
95
40
30
75
35
25
60
30
20
60
30
20
20
10
30
15
10
25
12
10
25
12
10
5
0
0
0
Max
220
200
200
190
150
120
120
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
90
60
80
60
80
60
80
60
70
50
60
40
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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