MT8980DP1 Zarlink Semiconductor, Inc., MT8980DP1 Datasheet - Page 7

• Manufacturer Part Number: MT8980DP1
• Description: 256 x 256 Channels (8 TDM Streams at 2.048 Mbps) Non-blocking Digital Switch (DX)
• Manufacturer: Zarlink Semiconductor, Inc.

If bit 6 of the Control Register is 0, then bits 2 and 0
of each Connection Memory High location function
normally (see Fig. 5). If bit 2 is 1, the associated ST-
BUS output channel is in Message Mode; i.e., the
byte in the corresponding Connection Memory Low
location is transmitted on the stream at that channel.
Otherwise, one of the bytes received on the serial
inputs is transmitted and the contents of the
Connection Memory Low define the ST-BUS input
stream and channel where the byte is to be found
(see Fig. 6).
If the ODE pin is low, then all serial outputs are high-
impedance.
Register is 1, then all outputs are active. If the ODE
pin is high and bit 6 in the Control Register is 0, then
the bit 0 in the Connection Memory High location
enables the output drivers for the corresponding
individual ST-BUS output stream and channel. Bit
0=1 enables the driver and bit 0=0 disables it (see
Fig. 5).
Bit 1 of each Connection Memory High location (see
Fig. 5) is output on the CSTo pin once every frame.
To allow for delay in any external control circuitry the
bit is output one channel before the corresponding
channel on the ST-BUS streams, and the bit for
stream 0 is output first in the channel; e.g., bit 1’s for
channel 9 of streams 0-7 are output synchronously
with ST-BUS channel 8 bits 7-0.
Applications
Use in a Simple Digital Switching System
Figs. 7 and 8 show how MT8980s can be used with
MT8964s to form a simple digital switching system.
Figure 7 - Example of Typical Interface between 8980s and 8964s for Simple Digital Switching System
8980 used
control and
in message
If it is high and bit 6 in the Control
8980 used
signalling
mode for
speech
switch
as
MT8980
MT8980
STo0
STi0
STo0
STi0
Fig. 7 shows the interface between the MT8980s and
the filter/codecs. Fig. 8 shows the position of these
components in an example architecture.
The MT8964 filter/codec in Fig. 7 receives and
transmits digitized voice signals on the ST-BUS input
D
signals are routed to the ST-BUS inputs and outputs
on the top MT8980, which is used as a digital speech
switch.
The MT8964 is controlled by the ST-BUS input D
originating
generates the appropriate signals from an output
channel in Message Mode.
optimizes the messaging capability of the line circuit
by building signalling logic, e.g., for on-off hook
detection, which communicates on an ST-BUS
output. This signalling ST-BUS output is monitored
by a microprocessor (not shown) through an ST-BUS
input on the bottom MT8980.
Fig. 8 shows how a simple digital switching system
may be designed using the ST-BUS architecture.
This is a private telephone network with 256
extensions which uses a single MT8980 as a speech
switch and a second MT8980 for communication with
the line interface circuits.
A larger digital switching system may be designed by
cascading a number of MT8980s. Fig. 9 shows how
four MT8980s may be arranged in a non-blocking
configuration which can switch any channel on any of
the ST-BUS inputs to any channel on the ST-BUS
outputs.
R
, and ST-BUS output D
Line Interface Circuit with 8964 Filter/Codec
D
D
D
X
R
C
from
Filter/Codec
Signalling
MT8964
Logic
the
bottom
X
, respectively.
Line Driver
Converter
2- to 4-
Wire
and
This architecture
MT8980,
MT8980D
These
which
2-9
C