HMP8170CN Intersil Corporation, HMP8170CN Datasheet - Page 15

• Manufacturer Part Number: HMP8170CN
• Description: NTSC/PAL Video Encoder
• Manufacturer: Intersil Corporation

NUMBER
NUMBER
DATA WRITE
DATA READ
BIT
BIT
7-0
7-5
4-3
2-0
SDA
SCL
S
S
Product ID
Video Timing
Standard
Output Format
NTSC / PAL
Setup Select
CHIP ADDR
CHIP ADDR
FUNCTION
FUNCTION
0x40 OR
0x40 OR
0x42
0x42
CONDITION
START
S
15
A
A
SUB ADDR
SUB ADDR
This 8-bit register specifies the last two digits of the product number. It is a read-only register.
Data written to it is ignored.
000 = (M) NTSC
001 = reserved
010 = (B, D, G, H, I) PAL
011 = (M) PAL
100 = (N) PAL
101 = (NC) PAL
110 = reserved
111 = reserved
00 = Composite + Y/C
01 = Composite + YUV (HMP8172 and HMP8173 only)
10 = Composite + RGB without sync on green (HMP8172 and HMP8173 only)
11 = Composite + RGB with sync on green (HMP8172 and HMP8173 only)
These bits specify the blanking pedestal during active video, from 0 IRE (“000”) to 7.5 IRE
(“111”). Typically, these bits should be a “111” during (M) NTSC and (M, N) PAL operation.
Otherwise, they should be a “000”. These bits do not affect the analog RGB or YUV outputs.
HMP8170, HMP8171, HMP8172, HMP8173
ADDRESS
FIGURE 11. REGISTER WRITE PROGRAMMING FLOW
1-7
TABLE 15. OUTPUT FORMAT REGISTER
A
A
FIGURE 10. I
TABLE 14. PRODUCT ID REGISTER
S
REGISTER
SUBADDR
POINTED
R/W
TO BY
DATA
8
CHIP ADDR
0x41 OR
SUB ADDRESS = 00
SUB ADDRESS = 01
0x43
2
C SERIAL TIMING FLOW
A
ACK
9
MAY BE REPEATED
OPTIONAL FRAME
A
DATA
DESCRIPTION
DESCRIPTION
n TIMES
REGISTER
SUBADDR
POINTED
DATA
TO BY
H
H
1-7
A
DATA
A
P
MAY BE REPEATED
OPTIONAL FRAME
DATA
n TIMES
8
NA
ACK
P
9
S = START CYCLE
P = STOP CYCLE
A = ACKNOWLEDGE
NA = NO ACKNOWLEDGE
CONDITION
STOP
FROM MASTER
FROM ENCODER
P
RESET
RESET
STATE
STATE
000B
111B
70H
71H
72H
73H
00B