TF28F008SA-100 Intel Corporation, TF28F008SA-100 Datasheet - Page 15

• Manufacturer Part Number: TF28F008SA-100
• Description: 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY
• Manufacturer: Intel Corporation

RY BY
Polling
RY BY
ware method of detecting byte write and block erase
completion It transitions low time t
write or erase command sequence is written to the
FULL STATUS CHECK PROCEDURE
is a full CMOS output that provides a hard-
and Byte Write Block Erase
Figure 7 Automated Byte Write Flowchart
290429– 6
290429– 7
WHRL
after a
Standby Read
Repeat for subsequent bytes
Full status check can be done after each byte or after a
sequence of bytes
Write FFH after the last byte write operation to reset the
device to Ready Array Mode
Operation
SR 3 MUST be cleared if set during a byte write attempt
before further attempts are allowed by the Write State
Machine
SR 4 is only cleared by the Clear Status Register Command
in cases where multiple bytes are written before full status is
checked
If error is detected clear the Status Register before
attempting retry or other error recovery
Optional
Standby
Standby
Operation
Read
Bus
28F008SA and returns to V
finished executing the internal algorithm
RY BY
the system CPU or controller It is active at all times
not tristated if the 28F008SA CE
are brought to V
device is in Erase Suspend or deep powerdown
modes
Write
Write
Bus
Command
can be connected to the interrupt input of
Command
Byte Write
Byte Write
Setup
IH
RY BY
CPU may already have read
Status Register data in WSM
Ready polling above
Check SR 3
1
Check SR 4
1
e
e
Data
Address
Data to be written
Address
Check RY BY
V
Read Status Register
Check SR 7
1
Toggle OE
update Status Register
V
Byte Write Error
OH
e
PP
Ready 0
e
Low Detect
e
OH
Comments
is also V
Ready V
40H (10H)
Comments
e
e
when the WSM has
Byte to be written
Byte to be written
or CE
or
e
or OE
OL
Busy
OH
28F008SA
e
to
when the
Busy
inputs
15