CY241V08A-12 Cypress Semiconductor, CY241V08A-12 Datasheet
CY241V08A-12
Related parts for CY241V08A-12
CY241V08A-12 Summary of contents
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... One copy of 27 MHz Cypress specification One copy of 74.25 MHz PLL OUTPUT DIVIDER VSS VDD • 3901 North First Street CY241V08A-12 Clock Generator with VCXO VCXO Control Output Frequencies linear 74.25MHz XBUF/27MHz , • San Jose CA 95134 • ...
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... Pin Number XIN 1 VDD 2 VCXO 3 VSS 4 XBUF/27 MHz 5 74.25 MHz XOUT 8 Document #: 38-07676 Rev DataSheet U .com Description Reference crystal input. Voltage supply. Input analog control for VCXO. Ground. 27 MHz buffered crystal output. 74.25 MHz clock output. No Connect. Reference crystal output. CY241V08A-12 Page ...
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... Name Description Duty Cycle is defined in Figure 1, 50 Output Clock Edge Rate, Measured from 20 LOAD Output Clock Edge Rate, Measured from 80 LOAD CY241V08A-12 Comments Min. Typ. Max. – 27 – 14 – – values are 3 – 1 150 – ...
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... Figure 1. Duty Cycle Definition t 3 Clock Output Figure (0 /t3 (0 Package Type Operating Range SZ08 8-pin SOIC Commercial SZ08 8-pin SOIC – Tape and Reel Commercial CY241V08A-12 Min. Typ. Max. – 150 – 250 – 430 – 270 – – Outputs ...
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... SEATING PLANE 0.061[1.549] 0.068[1.727] 0.004[0.102] 0.004[0.102] 0°~8° 0.0098[0.249] 0.0138[0.350] 0.0192[0.487] CY241V08A-12 MAX. ROUND ON SINGLE LEADFRAME RECTANGULAR ON MATRIX LEADFRAME PART # S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] ...
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... Document History Page Document Title: CY241V08A-12 Clock Generator with VCXO Document Number: 38-07676 REV. ECN NO. Issue Date ** 230997 See ECN Document #: 38-07676 Rev DataSheet U .com Orig. of Change Description of Change RGL New Data Sheet CY241V08A-12 Page ...