CY23EP09 Cypress Semiconductor, CY23EP09 Datasheet - Page 5

• Manufacturer Part Number: CY23EP09
• Description: 9-Output Zero Delay Buffer
• Manufacturer: Cypress Semiconductor

Document #: 38-07760 Rev. *B
3.3V and 2.5V AC Electrical Specifications
Switching Waveforms
t
T
T
Note:
10. Typical jitter is measured at 3.3V or 2.5V, 29°C, with all outputs driven into the maximum specified load. Further information regarding jitter specifications may
LOCK
Parameter
JCC
PER
be found in the application note “Understanding Data Sheet Jitter Specifications for Cypress Clock Products.”
[9,10]
[9,10]
PLL Lock Time
Cycle-to-cycle Jitter, Peak 3.3V supply, >66 MHz, <15 pF
Period Jitter, Peak
Description
OUTPUT
[9]
0.8V(0.6V)
2.0V(1.8V)
V
t
3
DD
Stable power supply, valid clocks presented on
REF and CLKOUT pins
3.3V supply, >66 MHz, <30 pF, standard drive
3.3V supply, >66 MHz, <30 pF, high drive
2.5V supply, >66 MHz, <15 pF, standard drive
2.5V supply, >66 MHz, <15 pF, high drive
2.5V supply, >66 MHz, <30 pF, high drive
S2:S1 = 1:0 mode, 3.3V, <15pF, standard drive
S2:S1 = 1:0 mode, 3.3V, <15pF, high drive
S2:S1 = 1:0 mode, 2.5V, <15pF, standard drive
S2:S1 = 1:0 mode, 2.5V, <15pF, high drive
3.3V supply, 66–100 MHz, <15 pF
3.3V supply, >100 MHz, <15 pF
3.3V supply, >66 MHz, <30 pF, standard drive
3.3V supply, >66 MHz, <30 pF, high drive
2.5V supply, >66 MHz, <15 pF, standard drive
2.5V supply, 66–100 MHz, <15 pF, high drive
2.5V supply, >100 MHz, <15 pF, high drive
S2:S1 = 1:0 mode, 3.3V, <15pF, standard drive
S2:S1 = 1:0 mode, 3.3V, <15pF, high drive
S2:S1 = 1:0 mode, 2.5V, <15pF, standard drive
S2:S1 = 1:0 mode, 2.5V, <15pF, high drive
/2
All Outputs Rise/Fall Time
Duty Cycle Timing
t
(continued)
2
V
DD
Test Conditions
/2
t
2.0V(1.8V)
1
0.8V(0.6V)
t
4
V
DD
/2
3.3V(2.5V)
0V
Min.
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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Typ.
25
65
53
35
30
75
16
14
23
22
20
15
40
30
25
25
15
28
24
40
37
–
CY23EP09
Max.
125
100
145
100
1.0
55
95
65
75
45
70
60
60
45
–
–
–
–
–
–
–
–
Page 5 of 13
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