CS9LASH-155.520 Raltron Electronics Corp., CS9LASH-155.520 Datasheet
CS9LASH-155.520
Manufacturer Part Number
CS9LASH-155.520
Description
Ultra Hf Clock Oscillator
Manufacturer
Raltron Electronics Corp.
Datasheet
1.CS9LASH-155.520.pdf
(3 pages)
Operating temperature range
Storage temperature range
Supply voltage
Maximum Input Voltage
Maximum Output Voltage
Nominal Frequency
Supply Voltage
Supply Current
Output Logic Type
Load
Output Voltage Levels
Duty Cycle
Rise / Fall Time
Jitter
Phase Noise
Sub Harmonics
Overall Frequency Stability
Pin 1
CS9L/CSPL SERIES: ULTRA HF CLOCK OSCILLATOR, PECL, +3.3 VDC or +2.5VDC
DESCRIPTION: A crystal controlled, high frequency, highly stable oscillator, adhering to Positive Emitter
Coupled Logic (PECL) Standards and fundamental crystal or analog multiplication technologies. The output can
be Tri-stated to facilitate testing or combined multiple clocks. The device is contained in a sub-miniature, very low
profile, leadless ceramic SMD package with 6 gold contact pads. This miniature oscillator is ideal for today's
automated assembly environments.
$ $ $ $ ABSOLUTE MAXIMUM RATINGS:
$ $ $ $ ELECTRICAL PARAMETERS:
APPLICATIONS AND FEATURES:
" Infiniband; Fiber Channel; SATA; 10GbE; Network Processors; SOHO Routing; Switches;
" Common Frequencies: 150 MHz; 156.25 MHz; 155.52 MHz; 161.1328 MHz; 212.5MHz; 312.5MHz
" +3.3 VDC or +2.5VDC PECL
" Frequency Range from 150.000 to 700 MHz
" Analog multiplication
" Miniature Ceramic SMD Package Available on Tape and Reel
" Lead Free and ROHS Compliant
R A L T R O N E L E C T R O N I C S C O R P . ! 1 0 6 5 1 N . W . 1 9
PARAMETER
PARAMETER
Output Enabled
Output Disabled
phone: (305) 593-6033 ! fax: (305) 594-3973 ! e-mail: sales@raltron.com ! WEB: http://www.raltron.com
Ta
T(stg)
Vcc
Vi
Vo
SYMBOL
fo
Vcc
Is
Voh
Vol
DC
tr / tf
J
£( f)
f_sub
En
Dis
SYMBO
f/fc
L
Connected between each output and Vcc – 2.0 VDC
min
max
Measured at 50% of Vcc
Measured at 20/80% and 80/20% Vcc Levels
Integrated Phase tji RMS, Fj = 12 kHz…20 MHz
Integrated Phase RMS tii offset frequency 50KHz to
80MHz
Deterministic period Jitter Dj using
wavecrest analyzer
Random period Jitter Rj using
wavecrest analyzer
Acumm. Peak to Peak Jitter Tp-p
using wavecrest analyzer
typ. @212.5MHz
Load, nom, Supply nom
Op. Temp., Aging, Load, Supply and Cal. Variations
High Voltage or No Connect
Ground
5
TEST CONDITIONS
6
4
4
*4
t h
Vss-0.5…Vcc+0.5
Vss-0.5…Vcc+0.5
*1
S t ! M i a m i , F l o r i d a 3 3 1 7 2 ! U . S . A .
Fo<320MHz.
Fo>320MHz.
Fo<320MHz.
Fo>320MHz.
Fo<320MHz.
Fo>320MHz.
Fo<320MHz.
Fo>320MHz.
-40…+85
-55…+90
f=10 Hz
f=100 Hz
f=1 KHz
f=100 KHz
f>1M Hz
f=10 KHz
VALUE
+4.6
5
PECL
50
150.000 ~ 700.00**
+3.3 or +2.5 5%
80.0 MAX
Vcc-1.025
Vcc-1.620
40/60 to 60/40 or 45/55 to 55/45
0.7 TYP 1.0 MAX
0.3 TYP**
0.5 TYP**
1 TYP **
8 TYP **
2.5 TYP **
2.5 TYP**
25 TYP**
27 TYP**
-65
-95
-125
-140
-145
-148
-50
-35
0.7 Vcc MIN
0.3 Vcc MAX
20, 25, 50, or 100 MAX
VALUE
*2
CLOCK
*3
Page 1 of 3
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
UNIT
VDC
VDC
VDC
UNIT
MHz
VDC
VDC
VDC
VDC
VDC
ppm
mA
dBc
ns
ps
ps
ps
ps
ps
C
C
%
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CS9LASH-155.520 Summary of contents
Page 1
CS9L/CSPL SERIES: ULTRA HF CLOCK OSCILLATOR, PECL, +3.3 VDC or +2.5VDC DESCRIPTION: A crystal controlled, high frequency, highly stable oscillator, adhering to Positive Emitter Coupled Logic (PECL) Standards and fundamental crystal or analog multiplication technologies. The output can be Tri-stated ...
Page 2
... SERIES CS9L: UHF +3.3Vdc Clock with PECL Comp. Output CSPL: UHF +2.5Vdc Clock with PECL Comp. Output EXAMPLE: CS9LASH-155.520 Clock Oscillator, 7x5mm Package, +3.3 VDC Supply Voltage, PECL Output, Standard Symmetry, 0…+70 C Operating Temperature Range, 50 ppm Total Frequency Stability, 155.520 MHz **Above 300MHz extended temp range and ± ...
Page 3
REFLOW PROFILE: **ROHS COMPLIANT ...