NCP5318 ON Semiconductor, NCP5318 Datasheet - Page 17

• Manufacturer Part Number: NCP5318
• Description: Two/Three/Four-Phase Buck CPU Controller
• Manufacturer: ON Semiconductor

Inductive Current Sensing
inductor as shown in Figure 19. In the diagram, L is the
output inductance and R
To compensate the current sense signal, the values of R
and C
criteria is met, the current sense signal should be the same
shape as the inductor current and the voltage signal between
CSxP and CSxN will represent the instantaneous value of
inductor current. Also, the circuit can be analyzed as if a
sense resistor of value R
designing inductors for use with inductive sensing,
tolerances and temperature effects should be considered.
Cores with a low permeability material or a large gap will
usually have minimal inductance change with temperature
and load. Copper magnet wire has a temperature coefficient
of 0.39% per degree C. The increase in winding resistance
at higher temperatures should be considered when setting
the phase peak current limit threshold. If current sensing
more accurate than provided by inductive sensing is
required, current can be sensed through a resistor as shown
in Figure 17.
External Ramp Size and Current Sensing
sense time constant. Typically, the current sense R
C
the inductor’s time constant. If RC is chosen to be smaller
(faster) than L/R
sensing signal will be scaled larger than the DC portion. This
will provide a larger steady−state ramp, but transient circuit
response will be affected and must be evaluated carefully.
The current signal will overshoot during transients and settle
at the rate determined by R
settle to the correct DC level, but the error will decay with
CSx
For lossless sensing, current can be measured across the
The internal ramp allows flexibility in setting the current
time constant should be equal to or slightly slower than
CSx
Figure 19. Enhanced V
are chosen so that L/R
(V
SWNODE
CORE
L
V
, the AC or transient portion of the current
OUT
)
L
is the inherent inductor resistance.
L
+
CSx
was used. When choosing or
RLx
Lx
x C
2
L
+
Control Employing Lossless Inductive Current Sensing and Internal Ramp
R
= R
CSx
CSx
C
CSx
. It will eventually
CSx
x C
CSx
x = 1, 2, 3 or 4
CSxP
CSxN
V
COMP
FB
. If this
http://onsemi.com
CSx
V
FFB
DAC
CSx
Out
“Fast−Feedback”
x
Connection
17
+
−
CSA
Internal Ramp
Current Sharing Accuracy
should sense the current at identical points at each phase
sense resistance. Printed Circuit Board (PCB) traces that
carry inductor current can be used as part of the current sense
resistance by selecting where the current sense signal is
picked up along a current carrying trace, but variations of
PCB copper base thickness, plating, and etching can degrade
current sharing and must be well controlled. The total
current sense resistance used for calculations must include
any PCB trace resistance that carries inductor current
between the CSxP input and the CSxN input. Current Sense
Amplifier (CSA) input mismatch and the value of the
current sense component will determine the accuracy of the
current sharing between phases. The worst case CSA input
mismatch is ±4 mV and will typically be within 1.5 mV. The
difference in peak currents between phases will be the CSA
input mismatch divided by the current sense resistance. If all
current sense components are of equal resistance, a
1.5 mV mismatch with a 1.0 mW sense resistance will
contribute 1.5 A of current difference between phases.
the time constant of R
degrade transient response, adaptive positioning (droop)
and current limit. During a positive current transient, the
COMP pin will be required to overshoot in response to the
current signal in order to maintain the output voltage. Phase
pulse−by−pulse overcurrent protection will trip earlier than
it would if compensated correctly. Similarly, the V
signal will overshoot which will produce too much transient
droop in the output voltage, and also result in hiccup−mode
current limit having a lower threshold for fast rising step
loads than for slowly rising output currents.
−
+
E.A.
For accurate current sharing, the current sense inputs
COx
Channel
Startup
Offset
CSx
+
−
x C
COMP
PWM
CSx
. Excessive error can
Latch Reset
To PWM
DRP