SC2596 Semtech Corporation, SC2596 Datasheet - Page 10

• Manufacturer Part Number: SC2596
• Description: Low Voltage Integrated DDR Termination Regulator
• Manufacturer: Semtech Corporation

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0.9V
Application_2: Lower Power Loss Configuration for
SSTL-2
If power loss is a major concern, separating the PVCC
form AVCC and VDDQ will be a good choice (Figure 2).
The PVCC can operate at lower voltage (1.8V to 2.5V) if
2.5V voltage is applied on AVCC and the VDDQ, the source
current is lower due to the lower operating voltage ap-
plied on the PVCC.
1.25V
Figure 2: Lower power loss for SSTL-2(DDR-I).
Figure 3: Lower power loss for SSTL-18(DDR-II).
© 2007 Semtech Corp.
POWER MANAGEMENT
Application Information (Cont.)
EN
2.5V
VREF
VREF
EN
0
10nF
0
10nF
Cref
100nF
1
2
3
4
1
2
3
4
100nF
Cref
GND
EN
VSENSE
VREF
GND
EN
VSENSE
VREF
SC2596
SC2596
VDDQ
PVCC
AVCC
VDDQ
VTT
PVCC
AVCC
VTT
8
7
6
5
8
7
6
5
VDDQ
2.5V
Cin2
1uF
1.8V
2.5V
VDDQ
PVCC
Cin1
1uF
2.5V
Cin1
100uF
100uF
Cin2
Cout
1.25V
220uF
0.9V
220uF
Cout
VTT
VTT
10
Application_3: High Source Current Configuration
If there is a need for VTT to source more current, espe-
cially for DDR-II applications, the system designer can tie
the AVCC and PVCC to 3.3V while has the VDDQ tie to 1.
8V. This configuration can ensure more than 2A source
and sink capability from the VTT rail.
0.9V
Figure 4: High current set up for SSTL-18(DDR-II).
Notes:
(a) The preferred configuration for DDR-I applications
is to tie AVCC and PVCC to VDDQ, which is typically 2.5V.
(b) If AVCC and PVCC rails are tied together, then the
VDDQ cannot lead the AVCC and PVCC.
EN
VREF
0
10nF
1M
1
2
3
4
100nF
Cref
GND
EN
VSENSE
VREF
SC2596
VDDQ
PVCC
AVCC
VTT
8
7
6
5
PRELIMINARY
1.8V
VDDQ
Cin1
1uF
www.semtech.com
SC2596
100uF
Cin2
3.3V
0.9V
220uF
Cout
VTT