AT91SAM7X512 ATMEL Corporation, AT91SAM7X512 Datasheet - Page 19

• Manufacturer Part Number: AT91SAM7X512
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL Corporation

8.4
8.4.1
8.4.2
8.4.3
6120DS–ATARM–03-Oct-06
Memory Mapping
Internal SRAM
Internal ROM
Internal Flash
After reset and until the Remap Command is performed, the SRAM is only accessible at address
0x0020 0000. After Remap, the SRAM also becomes available at address 0x0.
The AT91SAM7X512/256/128 embeds an Internal ROM. At any time, the ROM is mapped at
address 0x30 0000. The ROM contains the FFPI and the SAM-BA program.
At any time, the Flash is mapped to address 0x0010 0000. It is also accessible at address 0x0
after the reset, if GPNVM bit 2 is cleared and before the Remap Command.
A general purpose NVM (GPNVM) bit is used to boot either on the ROM (default) or from the
Flash.
This GPNVM bit can be cleared or set respectively through the commands “Clear General-pur-
pose NVM Bit” and “Set General-purpose NVM Bit” of the EFC User Interface.
Setting the GPNVM Bit 2 selects the boot from the Flash. Asserting ERASE clears the GPNVM
Bit 2 and thus selects the boot from the ROM by default.
Figure 8-2.
• The AT91SAM7X512 embeds a high-speed 128 Kbyte SRAM bank.
• The AT91SAM7X256 embeds a high-speed 64 Kbyte SRAM bank.
• The AT91SAM7X128 embeds a high-speed 32 Kbyte SRAM bank.
• The AT91SAM7X512 features two banks (dual plane) of 256 Kbytes of Flash.
• The AT91SAM7X256 features one bank (single plane) of 256 Kbytes of Flash.
• The AT91SAM7X128 features one bank (single plane) of 128 Kbytes of Flash.
AT91SAM7X512/256/128 Preliminary Summary
256M Bytes
Internal Memory Mapping with GPNVM Bit 2 = 0 (default)
0x0000 0000
0x0010 0000
0x0020 0000
0x0030 0000
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
0x003F FFFF
0x0040 0000
ROM Before Remap
SRAM After Remap
Undefined Areas
Internal FLASH
Internal SRAM
Internal ROM
(Abort)
252 M Bytes
1 M Bytes
1 M Bytes
1 M Bytes
1 M Bytes
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