ADS7835E Burr-Brown Corporation, ADS7835E Datasheet - Page 10

• Manufacturer Part Number: ADS7835E
• Description: 12-Bit/ High-Speed/ Low Power Sampling ANALOG-TO-DIGITAL CONVERTER
• Manufacturer: Burr-Brown Corporation

FIGURE 4. Power-Down Timing.
FIGURE 5. Serial Data “LSB-First” Timing.
typical performance curve “Supply Current vs Sample Rate.”
In contrast, the second method (clocking at a fixed rate)
means that each conversion takes X clock cycles. As the
time between conversions get longer, the converter remains
POWER MODE
SAMPLE/HOLD
POWER MODE
CONVERSION
SAMPLE/HOLD
CONVERSION
INTERNAL
INTERNAL
MODE
STATE
MODE
STATE
CONV
CONV
DATA
DATA
CLK
CLK
®
NOTES: (1) The low power mode (“power-down”) is entered when CONV remains LOW during the conversion and is still LOW at the
start of the 13th clock cycle. (2) The low power mode is exited when CONV goes HIGH. (3) When in power-down, the transition from
hold mode to sample mode is initiated by CONV going HIGH.
SAMPLE
NOTES: (1) The serial data can be transmitted LSB-first by pulling CONV LOW during the 13th clock cycle. (2) After the MSB has been
transmitted, the DATA output pin will remain LOW until CONV goes HIGH. (3) When CONV is taken LOW to initiate the LSB first transfer,
the converter enters the power-down mode.
SAMPLE
ADS7835
IDLE
IDLE
1
1
FULL POWER
CONVERSION IN PROGRESS
FULL POWER
CONVERSION IN PROGRESS
(MSB)
(MSB)
D11
D11
2
2
D10
D10
HOLD
HOLD
3
3
t
CKPD
t
t
CVH
CKCH
t
CVPD
D1
D1
12
12
10
(1)
(3)
(LSB)
in power-down an increasing percentage of time. This re-
duces total power consumption by a considerable amount.
For example, a 50kHz conversion rate results in roughly
1/10 of the power (minus the reference) that is used at a
(LSB)
D0
D0
13
(1)
13
LOW POWER
t
CVSP
t
14
D1
CKCS
(2)
(3)
LOW POWER
IDLE
t
D10
CVPU
23
IDLE
(MSB)
D11
24
SAMPLE
t
ACQ
FULL POWER
LOW...
(2)
t
CVDD
HOLD