MAX5556 Maxim Integrated Products, MAX5556 Datasheet - Page 14

• Manufacturer Part Number: MAX5556
• Description: Low-Cost Stereo Audio DAC
• Manufacturer: Maxim Integrated Products

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Once the MAX5556 recognizes a valid MCLK/LRCLK
ratio (256, 384, or 512), the analog outputs (OUTR and
OUTL) are enabled in stages using a glitchless ramping
routine. First, the outputs ramp up to the quiescent out-
put voltage at a rate of 5V/s typ (see Figure 11). After the
outputs reach the quiescent voltage, the converted data
Low-Cost Stereo Audio DAC
Figure 11. Power-Up Sequence
Figure 12. Invalid Clock Output Response
14
(OUTR OR OUTL)
VOLTAGE
OUTPUT
______________________________________________________________________________________
(OUTR OR OUTL)
VOLTAGE
OUTPUT
VALID MCLK/LRCLK RATIO
DETECTED
INVALID CLOCK
CONDITION
Power-Up
VOLTAGE AT 5V/s (TYP)
V
OUT_
TO QUIESCENT
MINIMUM OPERATING FREQUENCY
RE-ESTABLISHED AND MCLK
RAMPS UP
EQUAL OR GREATER THAN
VALID MCLK/LRCLK
MUTE: V
FORCED TO DC QUIESCENT
TIME
stream begins soft-start ramping, achieving the full-scale
operation over a 20ms period.
If invalid clock signals are detected while the outputs
are DC ramping to their quiescent state, the outputs
stop ramping and hold their preset values until valid
clock signals are restored (Figure 12).
LEVEL (2.4V)
TIME
OUT_
IMMEDIATELY
QUIESCENT VOLTAGE (2.4V)
V
OUT_
TO FULL SCALE (20ms TYP)
FOLLOW THE DATA. THE
AMPLITUDE IS RAMPED
SETTLES AT
V
OUT_
BEGINS TO
RAMPING (20ms TYP)
V
OUT_
SOFT-START