ADS-235 Datel, Inc., ADS-235 Datasheet - Page 4

• Manufacturer Part Number: ADS-235
• Description: Sampling A/D Converters
• Manufacturer: Datel, Inc.

ADS-235, ADS-236, ADS-237
data bus on the third cycle of the clock after the analog sample
is taken. After this latency delay, the digital data representing
each successive sample of the analog input is output during
the following clock cycle. The digital output data is
synchronized to the external sampling clock through a double
buffered latching circuit. The output of the digital error
correction circuit is available in offset binary format.
Differential Analog Input
The analog input is a differential input that can be configured in
various ways depending on the signal source and the level of
performance desired. A fully differential connection as shown
in figures 3.2 and 3.3 will give the best performance.
The ADS-235, ADS-236 and ADS-237 are powered by a single
+5V analog power supply which limits the analog input to
between ground and +5V. For the differential input connection
this implies that the analog input common mode voltage can
range from 1.0V to 4.0V, see figure 3.6. Performance for the
converter does not change significantly with the value of the
analog input common mode voltage. A DC voltage source, V
equal to 2.3V, typical, is provided to help simplify circuit design
when using an AC coupled differential input. This low
impedance voltage source is not designed to be a reference
voltage but makes an excellent DC bias source. This bias
voltage source stays well within the analog input common
mode voltage range over temperature.
The difference between the converter's two internal reference
voltages is 2V. For the AC coupled differential input, figure 3.2,
if V
with V
voltage equal to V
positive full scale when the V
V
will be at negative full scale when the V
V
converter has a peak-to-peak differential analog input voltage
range of ±2V.
The analog input can be DC coupled, figure 3.3, as long as the
inputs are within the analog input common mode voltage range
(1.0V £ V
necessary but may be used as load setting resistors. A
capacitor, C, connected from V
frequency noise. Values of approximately 20pF are normally
IN
DC
– input is at V
IN
-1V and V
is a 2Vp-p sinewave with –V
IN
, then V
DC
£ 4.0V). The resistors, R, are not absolutely
IN
– is at V
IN
DC
+ is a 2Vp-p sinewave riding on a DC bias
DC
-1V (V
. Consequently, the converter will be at a
Analog Input,
DC
IN
VIN
A/D CLK
+1V (V
+ - V
Output
Data
IN
+ input is at V
IN
IN
IN
+ to V
– = 2V). Conversely, the ADS
IN
+ - V
1.5V
180 degrees out of phase
IN
IN
IN
– will help filter high
– = –2V). Thus, the
+ input is equal to
tAP
DC
+1V and the
tAJ
TPWO
Figure 2B. Input-to-Output Timing
N–1
1.5V
5 n sec typ.
5 p sec typ.
DC
,
tH
4
tOD
sufficient but the actual value must take into account the
highest frequency component of the input signal.
Single-Ended Analog Input
The circuit in figure 3.4 may be used with a single-ended AC
coupled input. Assuming again that the difference between the
two internal voltage references is 2V and V
sinewave, then V
voltage equal to V
scale when V
equal to a negative full scale when VIN+ is equal toVDC-2V
(V
and 3V without significant change in the converters
performance. The simplest way to obtain a V
use the V
The single-ended analog input can be DC coupled, as shown
figure 3.5, as long as the input is within the analog input
common mode voltage range. The resistor, R, shown is not
absolutely necessary but may be used as a load setting
resistor. A capacitor, C, connected between V
help filter high frequency noise. A value of approximately 20pF
is normally sufficient but the actual value must take into
account the highest frequency component of the input signal.
INTERNAL REFERENCE GENERATOR, VR
The ADS-235/236/237 have an internal reference generator,
therefore, an external voltage is not required. V
connected to V
Two reference voltages are generated internally, 1.3V and
3.3V, for a fully differential input range of ±2V.
An external reference may be used by connecting the external
voltage reference to the V
units are tested with V
In order to minimize overall converter noise it is recommended
that adequate high frequency decoupling be provided at the
V
Digital I/O and Clock
The ADS-235, ADS-236 and ADS-237 provide a standard
high-speed interface to external TTL/CMOS logic families. In
order to ensure rated performance the duty cycle of the clock
should be held at 50% ±5%, have low jitter and operate at
standard TTL levels. Performance is guaranteed for conversion
RIN
TPW
IN
+ - V
pin.
1
8 n sec typ.
8 n sec typ.
2.0V
0.5V
IN
DC
– = –2V). In this case, V
output provided by the converters.
IN
+ is at V
RIN
IN
DC
when using the internal reference voltage.
+ is a 4Vp-p sinewave riding on a positive
N
. The converter will be at a positive full
RIN
DC
+2V (V
equal to 3.5V.
RIN
pin with V
IN
+ - V
DC
could range between 2V
®
IN
ROUT
– = 2V) and will be
left open. These
IN
DC
IN
is a 4Vp-p
+ and V
ROUT
voltage is to
OUT
must be
VR
IN
– will
IN
®