MAX1497 Maxim, MAX1497 Datasheet - Page 12

• Manufacturer Part Number: MAX1497
• Description: 3.5- and 4.5-Digit / Single-Chip ADCs with LED Drivers and C Interface
• Manufacturer: Maxim

3.5- and 4.5-Digit, Single-Chip ADCs with LED
Drivers and µC Interface
Figure
The MAX1497/MAX1499 contain an on-chip digital low-
pass filter that processes the data stream from the
modulator using a SINC
The SINC
periods (4 x 200ms).
The MAX1497/MAX1499 have 25% overrange capabili-
ty built into the modulator and digital filter. The digital fil-
ter is optimized for the f
clock frequencies can be used; however, 50Hz/60Hz
noise rejection decreases. The frequency response of the
SINC
12
______________________________________________________________________________________
4
1. MAX1499 Functional Diagram
filter is calculated as follows:
4
filter has a settling time of four output data
REF+
AIN+
REF-
AIN-
H z
H f
( )
( )
=
=
N
1




4
CLK
N
1 1










response:
AV
sin( ) x
sin
(
(
MAX1499
DD
1
sin
x
equal to 4.9152MHz. Other
-



BUFFERS
-
N
+2.5V
INPUT
-2.5V
Z



Z
π
-
f



-
π
DV
m
N
1
4
f
f
)
m
DD
)
f










Digital Filtering
4







4
REFERENCE
BANDGAP
2.048V
GND
SCLK
SERIAL I/O AND CONTROL
DIN
A = 1.22
ADC
DOUT
OSCILLATOR
+2.5V
where N is the oversampling ratio, and f
data rate = 5Hz.
Figure
SINC
times the first notch frequency (5Hz). The oversampling
ratio (OSR) for the MAX1497 is 128 and the OSR for the
MAX1499 is 1024.
The output data rate for the digital filter corresponds to
the positioning of the first notch of the filter’s frequency
response. The notches of the SINC
at multiples of the first notch frequency. The SINC
provides an attenuation of better than 100dB at these
notches. For example, 50Hz is equal to 10 times the
first notch frequency and 60Hz is equal to 12 times the
first notch frequency.
For large step changes at the input, allow a settling
time of 800ms before valid data is read.
Configure the MAX1497/MAX1499 to use either the
internal oscillator or an externally applied clock to drive
the modulator and filter. Set the EXTCLK bit in the con-
trol register to zero to put the device in internal-clock
mode. Set the EXTCLK bit to one to put the device in
CLOCK
CS
CHARGE
PUMP
V
NEG
CONVERTERS
BINARY-TO-
4
characteristic -3dB cutoff frequency is 0.228
BCD
2 shows the filter frequency response. The
-2.5V
LOWBATT
2.048V
I
SET
DRIVER
VLED
LED
CONTROL
TO
Filter Characteristics
4
EOC
SEG1
SEGF
SEGDP
DIG0
DIG4
LED_EN
GLED
CLK
filter are repeated
Clock Modes
m
= N x output
4
filter